From patchwork Thu Nov 25 16:59:30 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Stubbs X-Patchwork-Id: 1559824 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Received: from sourceware.org (ip-8-43-85-97.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4J0PHs62kCz9s5P for ; Fri, 26 Nov 2021 03:59:52 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 644B13858006 for ; Thu, 25 Nov 2021 16:59:49 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from esa4.mentor.iphmx.com (esa4.mentor.iphmx.com [68.232.137.252]) by sourceware.org (Postfix) with ESMTPS id EA4763858D35 for ; Thu, 25 Nov 2021 16:59:37 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org EA4763858D35 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=codesourcery.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=mentor.com IronPort-SDR: wBqYqDk1X6KfkD0UYQUPFrrMPPucZSBqHJxrbKxHcHBpPjb/c3npq2Vvpq2EGe1gcoHdy/oJlQ DAU43O1BHWX241o+pYrPEwov642LhdTxKneisszI7NrJHwwg6k3HtZcIsKp9G4e+VmbwYQU9Ol 9RRRTqZKuwVBBYn4dCR8UTeBMiXjrvrsItKf4pq1ANM+s4WMpp/s5t1pCq9Vtvw5a8xdmIf2J7 S/WQeabGb/ntJOzoxvF5Zy+p/aPwGFX5fMq/zL5ZM0gP7sp1fJY9Bmz83IW+PMTeF+BM8Udr9P bY3JDnbynjhzPinXLCAwlXFr X-IronPort-AV: E=Sophos;i="5.87,263,1631606400"; d="scan'208";a="68936211" Received: from orw-gwy-02-in.mentorg.com ([192.94.38.167]) by esa4.mentor.iphmx.com with ESMTP; 25 Nov 2021 08:59:36 -0800 IronPort-SDR: Q+G26H45U/LDTIpYnGQzfpFnLyceGLHso1IFl2+6WDZcjVoBEKGhMrE0cd2YxLt85Dk2Equ8Aw hysmbpATAS1FmlTEhvweHFg1krhSL8B8oV8KA23WO14tvd7SUvPF48QW+eHo4YgdSj1DgoIllv 7l5U+6g+KUuQ5jQASQVgYbVXvvUmVs9HoOJbE4I6MnJ7Or2TEtj2/ZDhrcZxjez2s8EKov1jbm WbdqDhYFLSBN7jCfKoDvD2DhJqtd65sEb9BckNRNRcDydg9wzSg0+xcTPxv6ctSreoFfyIxsDZ mbw= Message-ID: Date: Thu, 25 Nov 2021 16:59:30 +0000 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.3.2 Content-Language: en-GB To: "gcc-patches@gcc.gnu.org" From: Andrew Stubbs Subject: [commit][master+OG11] amdgcn: Fix ICE generating CFI [PR103396] X-Originating-IP: [137.202.0.90] X-ClientProxiedBy: svr-ies-mbx-05.mgc.mentorg.com (139.181.222.5) To svr-ies-mbx-01.mgc.mentorg.com (139.181.222.1) X-Spam-Status: No, score=-11.6 required=5.0 tests=BAYES_00, GIT_PATCH_0, HEADER_FROM_DIFFERENT_DOMAINS, KAM_DMARC_STATUS, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" If committed this patch to fix the amdgcn ICE reported in PR103396. The problem was that it was mis-counting the number of registers to save when the link register was only clobbered implicitly by calls. The issue is easily fixed by adjusting the condition to match elsewhere in the same function. Committed to master and backported to devel/omp/gcc-11. It should affect GCC 11. Andrew amdgcn: Fix ICE generating CFI [PR103396] gcc/ChangeLog: PR target/103396 * config/gcn/gcn.c (move_callee_saved_registers): Ensure that the number of spilled registers is counted correctly. diff --git a/gcc/config/gcn/gcn.c b/gcc/config/gcn/gcn.c index 75a9c576694..2bde88afc32 100644 --- a/gcc/config/gcn/gcn.c +++ b/gcc/config/gcn/gcn.c @@ -2785,7 +2785,7 @@ move_callee_saved_registers (rtx sp, machine_function *offsets, int start = (regno == VGPR_REGNO (7) ? 64 : 0); int count = MIN (saved_scalars - start, 64); int add_lr = (regno == VGPR_REGNO (6) - && df_regs_ever_live_p (LINK_REGNUM)); + && offsets->lr_needs_saving); int lrdest = -1; rtvec seq = rtvec_alloc (count + add_lr);