From patchwork Wed Oct 6 13:05:55 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Biener X-Patchwork-Id: 66908 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id 4D650B6EFF for ; Thu, 7 Oct 2010 00:06:04 +1100 (EST) Received: (qmail 6841 invoked by alias); 6 Oct 2010 13:06:02 -0000 Received: (qmail 6833 invoked by uid 22791); 6 Oct 2010 13:06:02 -0000 X-SWARE-Spam-Status: No, hits=-5.8 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_HI, TW_AV, T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from cantor.suse.de (HELO mx1.suse.de) (195.135.220.2) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Wed, 06 Oct 2010 13:05:57 +0000 Received: from relay1.suse.de (charybdis-ext.suse.de [195.135.221.2]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.suse.de (Postfix) with ESMTP id 855D774609; Wed, 6 Oct 2010 15:05:55 +0200 (CEST) Date: Wed, 6 Oct 2010 15:05:55 +0200 (CEST) From: Richard Guenther To: gcc-patches@gcc.gnu.org Cc: irar@il.ibm.com Subject: Re: [PATCH] Teach the vectorizer about multiple sizes In-Reply-To: Message-ID: References: User-Agent: Alpine 2.00 (LNX 1167 2008-08-23) MIME-Version: 1.0 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org On Wed, 6 Oct 2010, Richard Guenther wrote: > > This teaches the vectorizer about multiple possible SIMD vector sizes > as for example supported by x86 with AVX and SSE. This is the least > intrusive approach of adding support for autovectorizing using AVX > without regressing compared to what loops are vectorized with SSE > (because we'll fall back to SSE if AVX doesn't work). > > Bootstrapped and tested on x86_64-unknown-linux-gnu. > > I also built SPEC CPU 2006 with -mavx and fixed the fallout - a > bogus builtin used for V8SF -> V8SI vectorization and us rejecting > shuffle masks (int!) for 32byte floating-point shuffles (oh well ...). > > Ok for trunk? > > Thanks, > Richard. And this is actually the i386.c hunk missing from the previous post ... > 2010-10-06 Richard Guenther > ... > * config/i386/i386.c (ix86_vectorize_builtin_conversion): Fix > V8SF to V8SI conversion builtin. Index: gcc/config/i386/i386.c =================================================================== --- gcc/config/i386/i386.c.orig 2010-10-06 14:29:58.000000000 +0200 +++ gcc/config/i386/i386.c 2010-10-06 14:30:13.000000000 +0200 @@ -26272,7 +26272,7 @@ ix86_vectorize_builtin_conversion (unsig case V8SFmode: return (TYPE_UNSIGNED (src_type) ? NULL_TREE - : ix86_builtins[IX86_BUILTIN_CVTDQ2PS]); + : ix86_builtins[IX86_BUILTIN_CVTDQ2PS256]); default: return NULL_TREE; }