From patchwork Sat Jun 21 19:16:20 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Glisse X-Patchwork-Id: 362468 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 1EAE314008F for ; Sun, 22 Jun 2014 05:16:32 +1000 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:subject:message-id:mime-version:content-type; q=dns; s= default; b=V1qdfPDIeyjQjPblU1KOEpcIF9lQGJYr47NrxEalKU48wMeFG36Sr rlqJaVhb4G+IE6vk4bl9a7ko3oUoNHo4jFSj40t+B/Mh/9gHi6WXGmiOwZYkcHFl J6I6pRuwjFfa4HejBBFPUIfP+ZEfJSBShT9VXV/YtkyP76ripsF6TA= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:subject:message-id:mime-version:content-type; s= default; bh=a70hHuR8HKlD23t8mvcuWt7+y7M=; b=EQDq0gkqdZTyRddJj7IJ BkpfbMwqc1RzSYAM/NpgMGbxea6sMTEVQq8bbkZsfsmSmQ8vXXboG29z35gER4pN Iz3bj8odGnOhcSVt7w7y7R09L5Hwr67sw7yNy1n4Zpz82/u69m2vOoYbG7/Un7PL yYpFpIDOfDiDa4JOCy/7sH8= Received: (qmail 27683 invoked by alias); 21 Jun 2014 19:16:25 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 27671 invoked by uid 89); 21 Jun 2014 19:16:24 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-3.2 required=5.0 tests=AWL, BAYES_00, T_RP_MATCHES_RCVD autolearn=ham version=3.3.2 X-HELO: mail2-relais-roc.national.inria.fr Received: from mail2-relais-roc.national.inria.fr (HELO mail2-relais-roc.national.inria.fr) (192.134.164.83) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (CAMELLIA256-SHA encrypted) ESMTPS; Sat, 21 Jun 2014 19:16:23 +0000 Received: from stedding.saclay.inria.fr ([193.55.250.194]) by mail2-relais-roc.national.inria.fr with ESMTP/TLS/AES128-SHA; 21 Jun 2014 21:16:20 +0200 Received: from glisse (helo=localhost) by stedding.saclay.inria.fr with local-esmtp (Exim 4.82_1-5b7a7c0-XX) (envelope-from ) id 1WyQlw-00052H-Gs for gcc-patches@gcc.gnu.org; Sat, 21 Jun 2014 21:16:20 +0200 Date: Sat, 21 Jun 2014 21:16:20 +0200 (CEST) From: Marc Glisse To: gcc-patches@gcc.gnu.org Subject: [RTL] (vec_select (vec_concat a b) c) may be just a or b Message-ID: User-Agent: Alpine 2.02 (DEB 1266 2009-07-14) MIME-Version: 1.0 Hello, this is another small simplification of RTL for vectors. Note that it doesn't really solve the problem, because these simplifications are only performed for single-use objects. If I start from vectors [a,b] and [c,d] and concatenate them into [a,b,c,d], then extract both halves, as in the original testcase in the PR, we won't notice that those are the original vectors. Still, better than nothing... (we output a vzeroupper for the testcase, that seems unnecessary) Bootstrap+testsuite on x86_64-linux-gnu. 2014-06-22 Marc Glisse PR target/44551 gcc/ * simplify-rtx.c (simplify_binary_operation_1) : Optimize inverse of a VEC_CONCAT. gcc/testsuite/ * gcc.target/i386/pr44551-1.c: New file. Index: gcc/simplify-rtx.c =================================================================== --- gcc/simplify-rtx.c (revision 211867) +++ gcc/simplify-rtx.c (working copy) @@ -3359,20 +3359,64 @@ simplify_binary_operation_1 (enum rtx_co unsigned int i0 = INTVAL (XVECEXP (trueop1, 0, 0)); unsigned int i1 = INTVAL (XVECEXP (trueop1, 0, 1)); rtx subop0, subop1; gcc_assert (i0 < 2 && i1 < 2); subop0 = XEXP (trueop0, i0); subop1 = XEXP (trueop0, i1); return simplify_gen_binary (VEC_CONCAT, mode, subop0, subop1); } + + /* If we select one half of a vec_concat, return that. */ + if (GET_CODE (trueop0) == VEC_CONCAT + && CONST_INT_P (XVECEXP (trueop1, 0, 0))) + { + rtx subop0 = XEXP (trueop0, 0); + rtx subop1 = XEXP (trueop0, 1); + enum machine_mode mode0 = GET_MODE (subop0); + enum machine_mode mode1 = GET_MODE (subop1); + int li = GET_MODE_SIZE (GET_MODE_INNER (mode0)); + int l0 = GET_MODE_SIZE (mode0) / li; + int l1 = GET_MODE_SIZE (mode1) / li; + int i0 = INTVAL (XVECEXP (trueop1, 0, 0)); + if (i0 == 0 && !side_effects_p (op1) && mode == mode0) + { + bool success = true; + for (int i = 1; i < l0; ++i) + { + rtx j = XVECEXP (trueop1, 0, i); + if (!CONST_INT_P (j) || INTVAL (j) != i) + { + success = false; + break; + } + } + if (success) + return subop0; + } + if (i0 == l0 && !side_effects_p (op0) && mode == mode1) + { + bool success = true; + for (int i = 1; i < l1; ++i) + { + rtx j = XVECEXP (trueop1, 0, i); + if (!CONST_INT_P (j) || INTVAL (j) != i0 + i) + { + success = false; + break; + } + } + if (success) + return subop1; + } + } } if (XVECLEN (trueop1, 0) == 1 && CONST_INT_P (XVECEXP (trueop1, 0, 0)) && GET_CODE (trueop0) == VEC_CONCAT) { rtx vec = trueop0; int offset = INTVAL (XVECEXP (trueop1, 0, 0)) * GET_MODE_SIZE (mode); /* Try to find the element in the VEC_CONCAT. */ Index: gcc/testsuite/gcc.target/i386/pr44551-1.c =================================================================== --- gcc/testsuite/gcc.target/i386/pr44551-1.c (revision 0) +++ gcc/testsuite/gcc.target/i386/pr44551-1.c (working copy) @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx" } */ + +#include + +__m128i +foo (__m256i x, __m128i y) +{ + __m256i r = _mm256_insertf128_si256(x, y, 1); + __m128i a = _mm256_extractf128_si256(r, 1); + return a; +} + +/* { dg-final { scan-assembler-not "vinsertf" } } */ +/* { dg-final { scan-assembler-not "vextractf" } } */