diff mbox

[i386] logical shift right in shrd

Message ID alpine.DEB.2.02.1406211552060.11807@stedding.saclay.inria.fr
State New
Headers show

Commit Message

Marc Glisse June 21, 2014, 4:32 p.m. UTC 
On Sat, 21 Jun 2014, Uros Bizjak wrote:

> On Fri, Jun 20, 2014 at 10:42 PM, Marc Glisse <marc.glisse@inria.fr> wrote:
>
>> as reported in PR 61503, there seems to be a typo in the shrd pattern. I
>> think it is quite unlikely to cause any problem, because the pattern is 1
>> instruction too long for combine to recognize it (by the way, if someone has
>> suggestions for PR 55583...). But it is still better to fix it.
>>
>> Bootstrap+testsuite on x86_64-linux-gnu.
>>
>> 2014-06-21  Marc Glisse  <marc.glisse@inria.fr>
>>
>>         PR target/61503
>>         * config/i386/i386.md (x86_64_shrd, x86_shrd): Replace ashiftrt
>>         with lshiftrt.
>
> OK for mainline and 4.9.

Thanks.

Er, I am sorry, I don't know what happened, but when testing the backport 
to 4.9 I got an obvious failure in the testsuite, which I am sure should 
also happen on trunk, but somehow I didn't see it (I am almost sure I 
tested the right branch though). Anyway, here is an updated patch, that 
did pass bootstrap+testsuite both on trunk and 4.9. I haven't committed 
anything yet, is the new patch ok?

2014-06-21  Marc Glisse  <marc.glisse@inria.fr>

 	PR target/61503
 	* config/i386/i386.md (x86_64_shrd, x86_shrd,
 	ix86_rotr<dwi>3_doubleword): Replace ashiftrt with lshiftrt.

Comments

Uros Bizjak June 22, 2014, 8:06 a.m. UTC | #1 
On Sat, Jun 21, 2014 at 6:32 PM, Marc Glisse <marc.glisse@inria.fr> wrote:

> Er, I am sorry, I don't know what happened, but when testing the backport to
> 4.9 I got an obvious failure in the testsuite, which I am sure should also
> happen on trunk, but somehow I didn't see it (I am almost sure I tested the
> right branch though). Anyway, here is an updated patch, that did pass
> bootstrap+testsuite both on trunk and 4.9. I haven't committed anything yet,
> is the new patch ok?
>
>
> 2014-06-21  Marc Glisse  <marc.glisse@inria.fr>
>
>         PR target/61503
>         * config/i386/i386.md (x86_64_shrd, x86_shrd,
>         ix86_rotr<dwi>3_doubleword): Replace ashiftrt with lshiftrt.

OK, but please wait a couple of days with the backport.

Thanks,
Uros.
diff mbox

Patch

Index: gcc/config/i386/i386.md
===================================================================
--- gcc/config/i386/i386.md	(revision 211865)
+++ gcc/config/i386/i386.md	(working copy)
@@ -9601,37 +9601,37 @@ 
 		     (match_operand:<DWI> 1 "register_operand")
 		     (match_operand:QI 2 "nonmemory_operand")))
 	      (clobber (reg:CC FLAGS_REG))])
    (match_dup 3)]
   "TARGET_CMOVE"
   [(const_int 0)]
   "ix86_split_<shift_insn> (operands, operands[3], <DWI>mode); DONE;")
 
 (define_insn "x86_64_shrd"
   [(set (match_operand:DI 0 "nonimmediate_operand" "+r*m")
-        (ior:DI (ashiftrt:DI (match_dup 0)
+        (ior:DI (lshiftrt:DI (match_dup 0)
 		  (match_operand:QI 2 "nonmemory_operand" "Jc"))
 		(ashift:DI (match_operand:DI 1 "register_operand" "r")
 		  (minus:QI (const_int 64) (match_dup 2)))))
    (clobber (reg:CC FLAGS_REG))]
   "TARGET_64BIT"
   "shrd{q}\t{%s2%1, %0|%0, %1, %2}"
   [(set_attr "type" "ishift")
    (set_attr "prefix_0f" "1")
    (set_attr "mode" "DI")
    (set_attr "athlon_decode" "vector")
    (set_attr "amdfam10_decode" "vector")
    (set_attr "bdver1_decode" "vector")])
 
 (define_insn "x86_shrd"
   [(set (match_operand:SI 0 "nonimmediate_operand" "+r*m")
-        (ior:SI (ashiftrt:SI (match_dup 0)
+        (ior:SI (lshiftrt:SI (match_dup 0)
 		  (match_operand:QI 2 "nonmemory_operand" "Ic"))
 		(ashift:SI (match_operand:SI 1 "register_operand" "r")
 		  (minus:QI (const_int 32) (match_dup 2)))))
    (clobber (reg:CC FLAGS_REG))]
   ""
   "shrd{l}\t{%s2%1, %0|%0, %1, %2}"
   [(set_attr "type" "ishift")
    (set_attr "prefix_0f" "1")
    (set_attr "mode" "SI")
    (set_attr "pent_pair" "np")
@@ -10069,27 +10069,27 @@ 
        (rotatert:<DWI> (match_operand:<DWI> 1 "register_operand" "0")
 		       (match_operand:QI 2 "<shift_immediate_operand>" "<S>")))
   (clobber (reg:CC FLAGS_REG))
   (clobber (match_scratch:DWIH 3 "=&r"))]
  ""
  "#"
  "reload_completed"
  [(set (match_dup 3) (match_dup 4))
   (parallel
    [(set (match_dup 4)
-	 (ior:DWIH (ashiftrt:DWIH (match_dup 4) (match_dup 2))
+	 (ior:DWIH (lshiftrt:DWIH (match_dup 4) (match_dup 2))
 		   (ashift:DWIH (match_dup 5)
 				(minus:QI (match_dup 6) (match_dup 2)))))
     (clobber (reg:CC FLAGS_REG))])
   (parallel
    [(set (match_dup 5)
-	 (ior:DWIH (ashiftrt:DWIH (match_dup 5) (match_dup 2))
+	 (ior:DWIH (lshiftrt:DWIH (match_dup 5) (match_dup 2))
 		   (ashift:DWIH (match_dup 3)
 				(minus:QI (match_dup 6) (match_dup 2)))))
     (clobber (reg:CC FLAGS_REG))])]
 {
   operands[6] = GEN_INT (GET_MODE_BITSIZE (<MODE>mode));
 
   split_double_mode (<DWI>mode, &operands[0], 1, &operands[4], &operands[5]);
 })
 
 (define_insn "*bmi2_rorx<mode>3_1"