| Message ID | ab84fe45-f973-54eb-49f6-8ea2bdb9a62e@e124511.cambridge.arm.com |
|---|---|
| State | New |
| Headers | show |
| Series | aarch64: Extend aarch64_feature_flags to 128 bits | expand |
> On 11 Jul 2024, at 14:12, Andrew Carlotti <andrew.carlotti@arm.com> wrote: > > External email: Use caution opening links or attachments > > > AARCH64_NUM_ISA_MODES will be used within aarch64-opts.h in a later > commit. > > gcc/ChangeLog: > > * config/aarch64/aarch64.h (DEF_AARCH64_ISA_MODE): Move to... > * config/aarch64/aarch64-opts.h (DEF_AARCH64_ISA_MODE): ...here. > > Ok. Thanks, Kyrill > diff --git a/gcc/config/aarch64/aarch64-opts.h b/gcc/config/aarch64/aarch64-opts.h > index a05c0d3ded1c69802f15eebb8c150c7dcc62b4ef..06a4fed3833482543891b4f7c778933f7cebd631 100644 > --- a/gcc/config/aarch64/aarch64-opts.h > +++ b/gcc/config/aarch64/aarch64-opts.h > @@ -24,6 +24,11 @@ > > #ifndef USED_FOR_TARGET > typedef uint64_t aarch64_feature_flags; > + > +constexpr unsigned int AARCH64_NUM_ISA_MODES = (0 > +#define DEF_AARCH64_ISA_MODE(IDENT) + 1 > +#include "aarch64-isa-modes.def" > +); > #endif > > /* The various cores that implement AArch64. */ > diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h > index fac1882bcb38eae3690c2dc366ebc6c3f64ee940..2be6dc4089b81d2a4e1ba6861b25094774198406 100644 > --- a/gcc/config/aarch64/aarch64.h > +++ b/gcc/config/aarch64/aarch64.h > @@ -183,11 +183,6 @@ enum class aarch64_feature : unsigned char { > > constexpr auto AARCH64_FL_SM_STATE = AARCH64_FL_SM_ON | AARCH64_FL_SM_OFF; > > -constexpr unsigned int AARCH64_NUM_ISA_MODES = (0 > -#define DEF_AARCH64_ISA_MODE(IDENT) + 1 > -#include "aarch64-isa-modes.def" > -); > - > /* The mask of all ISA modes. */ > constexpr auto AARCH64_FL_ISA_MODES > = (aarch64_feature_flags (1) << AARCH64_NUM_ISA_MODES) - 1;
diff --git a/gcc/config/aarch64/aarch64-opts.h b/gcc/config/aarch64/aarch64-opts.h index a05c0d3ded1c69802f15eebb8c150c7dcc62b4ef..06a4fed3833482543891b4f7c778933f7cebd631 100644 --- a/gcc/config/aarch64/aarch64-opts.h +++ b/gcc/config/aarch64/aarch64-opts.h @@ -24,6 +24,11 @@ #ifndef USED_FOR_TARGET typedef uint64_t aarch64_feature_flags; + +constexpr unsigned int AARCH64_NUM_ISA_MODES = (0 +#define DEF_AARCH64_ISA_MODE(IDENT) + 1 +#include "aarch64-isa-modes.def" +); #endif /* The various cores that implement AArch64. */ diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h index fac1882bcb38eae3690c2dc366ebc6c3f64ee940..2be6dc4089b81d2a4e1ba6861b25094774198406 100644 --- a/gcc/config/aarch64/aarch64.h +++ b/gcc/config/aarch64/aarch64.h @@ -183,11 +183,6 @@ enum class aarch64_feature : unsigned char { constexpr auto AARCH64_FL_SM_STATE = AARCH64_FL_SM_ON | AARCH64_FL_SM_OFF; -constexpr unsigned int AARCH64_NUM_ISA_MODES = (0 -#define DEF_AARCH64_ISA_MODE(IDENT) + 1 -#include "aarch64-isa-modes.def" -); - /* The mask of all ISA modes. */ constexpr auto AARCH64_FL_ISA_MODES = (aarch64_feature_flags (1) << AARCH64_NUM_ISA_MODES) - 1;