From patchwork Fri Oct 18 10:53:49 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Andre Vieira (lists)" X-Patchwork-Id: 1179291 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-511276-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="B0Gb1aTi"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46vjZp3qpKz9sNw for ; Fri, 18 Oct 2019 21:54:08 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:to:cc :from:subject:message-id:date:mime-version:content-type; q=dns; s=default; b=pB2Lj/HMoVA/qLAnXBrE4fjWsJ14dQZj8ptixDws0ZDiOpQoq8 jrpU3uXI/Ykengt+v6u8nY+le3CXX4N7EE1l1jmoD306AEjDnyuE3nkGxx4E0tRs AyX9EC353KdFwAwb4MEx+9TwtQoRKP11paqHYuCyeEtjKGt3hvR6uJSzU= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:to:cc :from:subject:message-id:date:mime-version:content-type; s= default; bh=GLmL2baub+7kFqZSGfv4qMtWV9Q=; b=B0Gb1aTib/fJKJivLVTM jd6wrr9wEGRKdWKnDc9tJGQabn4V3CVVN2jWCVG+AK4jVnHHE1Ci9F2VgZT1Zztt 6PV1o6umJ7r//mKHaTzhHqLLUhEkghn7sS4p00IAyHUj3oQk/XsS3MG+XX74fRnN KSxIM2xFGCm3Mo1jNtJ2zTY= Received: (qmail 114115 invoked by alias); 18 Oct 2019 10:54:00 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 114104 invoked by uid 89); 18 Oct 2019 10:54:00 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-24.1 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, SPF_PASS autolearn=ham version=3.3.1 spammy=multilibs, simd X-HELO: foss.arm.com Received: from Unknown (HELO foss.arm.com) (217.140.110.172) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 18 Oct 2019 10:53:58 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 35505AB6; Fri, 18 Oct 2019 03:53:51 -0700 (PDT) Received: from [10.2.206.37] (e107157-lin.cambridge.arm.com [10.2.206.37]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B45AF3F6C4; Fri, 18 Oct 2019 03:53:50 -0700 (PDT) To: gcc-patches Cc: Kyrylo Tkachov , Richard Earnshaw From: "Andre Vieira (lists)" Subject: [PATCH][Arm] Fix multilibs for Armv7-R Message-ID: Date: Fri, 18 Oct 2019 11:53:49 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.9.0 MIME-Version: 1.0 X-IsSubscribed: yes Hi This patch maps multilibs using -march=armv7-r+vfpv3-d16-fp16 and -march=armv7-r+vfpv3-d16-fp16+idiv to v7+fp. This patch also adds a new multilib for armv7-r+fp.sp and maps -march=armv7-r+fp.sp+idiv, -march=armv7-r+vfpv3xd-fp16 and -march=armv7-r+vfpv3xd-fp16+idiv to it. This solves issues encountered when trying to link for -mcpu=cortex-r8 -mfloat-abi=hard. Built arm-none-eabi and compared testsuite run of -march=armv7e-m+fp/-mfloat-abi=hard to -march=armv7-r+fp.sp/-mfloat-abi=hard which looked alright. Is this OK for trunk? gcc/ChangeLog: 2019-10-18 Andre Vieira * config/arm/t-multilib: Add new multilib variants and new mappings. gcc/testsuite/ChangeLog: 2019-10-18 Andre Vieira * gcc.target/arm/multilib.exp: Add extra tests. Cheers, Andre diff --git a/gcc/config/arm/t-multilib b/gcc/config/arm/t-multilib index 08526302283eea03e4a8f22a2a049e85bd7bb6af..84ba5c9d32c839851ce9d75572e43c269f19722d 100644 --- a/gcc/config/arm/t-multilib +++ b/gcc/config/arm/t-multilib @@ -24,6 +24,8 @@ # values during the configure step. We enforce this during the # top-level configury. +s-mlib: $(srcdir)/config/arm/t-multilib $(srcdir)/config/arm/t-aprofile $(srcdir)/config/arm/t-rmprofile + MULTILIB_OPTIONS = MULTILIB_DIRNAMES = MULTILIB_EXCEPTIONS = @@ -63,6 +65,7 @@ all_early_arch := armv5tej armv6 armv6j armv6k armv6z armv6kz \ v7_a_arch_variants := $(call all_feat_combs, mp sec) v7_a_nosimd_variants := +fp +vfpv3 +vfpv3-d16-fp16 +vfpv3-fp16 +vfpv4-d16 +vfpv4 v7_a_simd_variants := +simd +neon-fp16 +neon-vfpv4 +v7_r_sp_variants := +fp.sp +fp.sp+idiv +vfpv3xd-fp16 +vfpv3xd-fp16+idiv v7ve_nosimd_variants := +vfpv3-d16 +vfpv3 +vfpv3-d16-fp16 +vfpv3-fp16 +fp +vfpv4 v7ve_vfpv3_simd_variants := +neon +neon-fp16 v7ve_vfpv4_simd_variants := +simd @@ -86,8 +89,8 @@ SEP := $(and $(HAS_APROFILE),$(HAS_RMPROFILE),/) MULTILIB_OPTIONS += marm/mthumb MULTILIB_DIRNAMES += arm thumb -MULTILIB_OPTIONS += march=armv5te+fp/march=armv7/march=armv7+fp/$(MULTI_ARCH_OPTS_A)$(SEP)$(MULTI_ARCH_OPTS_RM) -MULTILIB_DIRNAMES += v5te v7 v7+fp $(MULTI_ARCH_DIRS_A) $(MULTI_ARCH_DIRS_RM) +MULTILIB_OPTIONS += march=armv5te+fp/march=armv7/march=armv7+fp/march=armv7-r+fp.sp/$(MULTI_ARCH_OPTS_A)$(SEP)$(MULTI_ARCH_OPTS_RM) +MULTILIB_DIRNAMES += v5te v7 v7+fp v7-r+fp.sp $(MULTI_ARCH_DIRS_A) $(MULTI_ARCH_DIRS_RM) MULTILIB_OPTIONS += mfloat-abi=soft/mfloat-abi=softfp/mfloat-abi=hard MULTILIB_DIRNAMES += nofp softfp hard @@ -100,22 +103,31 @@ MULTILIB_REQUIRED += mthumb/march=armv7/mfloat-abi=soft MULTILIB_REQUIRED += mthumb/march=armv7+fp/mfloat-abi=softfp MULTILIB_REQUIRED += mthumb/march=armv7+fp/mfloat-abi=hard -# Map v7-r down onto common v7 code. +MULTILIB_REQUIRED += mthumb/march=armv7-r+fp.sp/mfloat-abi=softfp +MULTILIB_REQUIRED += mthumb/march=armv7-r+fp.sp/mfloat-abi=hard + +# Map v7-r with double precision down onto common v7 code. MULTILIB_MATCHES += march?armv7=march?armv7-r MULTILIB_MATCHES += march?armv7=march?armv7-r+idiv -MULTILIB_MATCHES += march?armv7+fp=march?armv7-r+fp -MULTILIB_MATCHES += march?armv7+fp=march?armv7-r+fp+idiv +MULTILIB_MATCHES += $(foreach ARCH,+fp +fp+idiv +vfpv3-d16-fp16 +vfpv3-d16-fp16+idiv, \ + march?armv7+fp=march?armv7-r$(ARCH)) + +# Map v7-r single precision variants to v7-r with single precision. +MULTILIB_MATCHES += $(foreach ARCH, \ + $(filter-out +fp.sp, $(v7_r_sp_variants)), \ + march?armv7-r+fp.sp=march?armv7-r$(ARCH)) MULTILIB_MATCHES += $(foreach ARCH, $(all_early_arch), \ march?armv5te+fp=march?$(ARCH)+fp) -# Map v8-r down onto common v7 code. +# Map v8-r down onto common v7 code or v7-r sp. MULTILIB_MATCHES += march?armv7=march?armv8-r MULTILIB_MATCHES += $(foreach ARCH, $(v8_r_nosimd_variants), \ march?armv7=march?armv8-r$(ARCH)) MULTILIB_MATCHES += $(foreach ARCH,+simd +crypto, \ march?armv7+fp=march?armv8-r$(ARCH) \ march?armv7+fp=march?armv8-r+crc$(ARCH)) - +MULTILIB_MATCHES += march?armv7-r+fp.sp=march?armv8-r+fp.sp +MULTILIB_MATCHES += march?armv7-r+fp.sp=march?armv8-r+crc+fp.sp ifeq (,$(HAS_APROFILE)) # Map all v7-a @@ -177,7 +189,7 @@ MULTILIB_MATCHES += $(foreach ARCH, $(v8_5_a_simd_variants), \ MULTILIB_REUSE += mthumb/march.armv7/mfloat-abi.soft=marm/march.armv7/mfloat-abi.soft MULTILIB_REUSE += $(foreach ABI, hard softfp, \ - $(foreach ARCH, armv7+fp, \ + $(foreach ARCH, armv7+fp armv7-r+fp\.sp, \ mthumb/march.$(ARCH)/mfloat-abi.$(ABI)=marm/march.$(ARCH)/mfloat-abi.$(ABI))) # Softfp but no FP, use the soft-float libraries. diff --git a/gcc/testsuite/gcc.target/arm/multilib.exp b/gcc/testsuite/gcc.target/arm/multilib.exp index d82306ed630f2df0645ccaa43ba1f9dd3d5c72ed..7d8fc3a57e9bb6e568e9e04224535487c8c72289 100644 --- a/gcc/testsuite/gcc.target/arm/multilib.exp +++ b/gcc/testsuite/gcc.target/arm/multilib.exp @@ -753,6 +753,28 @@ if {[multilib_config "rmprofile"] } { {-march=armv8-m.main+fp.dp -mfpu=fpv5-d16 -mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp" {-march=armv8-m.main+fp+dsp -mfpu=fpv5-d16 -mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp" {-march=armv8-m.main+fp.dp+dsp -mfpu=fpv5-d16 -mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp" + {-march=armv7-r+fp -mfpu=auto -mfloat-abi=softfp} "thumb/v7+fp/softfp" + {-march=armv7-r+fp -mfpu=auto -mfloat-abi=hard} "thumb/v7+fp/hard" + {-march=armv7-r+fp+idiv -mfpu=auto -mfloat-abi=softfp} "thumb/v7+fp/softfp" + {-march=armv7-r+fp+idiv -mfpu=auto -mfloat-abi=hard} "thumb/v7+fp/hard" + {-march=armv7-r+vfpv3-d16-fp16 -mfpu=auto -mfloat-abi=softfp} "thumb/v7+fp/softfp" + {-march=armv7-r+vfpv3-d16-fp16 -mfpu=auto -mfloat-abi=hard} "thumb/v7+fp/hard" + {-march=armv7-r+vfpv3-d16-fp16+idiv -mfpu=auto -mfloat-abi=softfp} "thumb/v7+fp/softfp" + {-march=armv7-r+vfpv3-d16-fp16+idiv -mfpu=auto -mfloat-abi=hard} "thumb/v7+fp/hard" + {-march=armv7-r+fp.sp -mfpu=auto -mfloat-abi=softfp} "thumb/v7-r+fp.sp/softfp" + {-march=armv7-r+fp.sp -mfpu=auto -mfloat-abi=hard} "thumb/v7-r+fp.sp/hard" + {-march=armv7-r+fp.sp+idiv -mfpu=auto -mfloat-abi=softfp} "thumb/v7-r+fp.sp/softfp" + {-march=armv7-r+fp.sp+idiv -mfpu=auto -mfloat-abi=hard} "thumb/v7-r+fp.sp/hard" + {-march=armv7-r+vfpv3xd -mfpu=auto -mfloat-abi=softfp} "thumb/v7-r+fp.sp/softfp" + {-march=armv7-r+vfpv3xd -mfpu=auto -mfloat-abi=hard} "thumb/v7-r+fp.sp/hard" + {-march=armv7-r+vfpv3xd+idiv -mfpu=auto -mfloat-abi=softfp} "thumb/v7-r+fp.sp/softfp" + {-march=armv7-r+vfpv3xd+idiv -mfpu=auto -mfloat-abi=hard} "thumb/v7-r+fp.sp/hard" + {-march=armv7-r+vfpv3xd-fp16+idiv -mfpu=auto -mfloat-abi=softfp} "thumb/v7-r+fp.sp/softfp" + {-march=armv7-r+vfpv3xd-fp16+idiv -mfpu=auto -mfloat-abi=hard} "thumb/v7-r+fp.sp/hard" + {-march=armv8-r+fp.sp -mfpu=auto -mfloat-abi=softfp} "thumb/v7-r+fp.sp/softfp" + {-march=armv8-r+fp.sp -mfpu=auto -mfloat-abi=hard} "thumb/v7-r+fp.sp/hard" + {-march=armv8-r+crc+fp.sp -mfpu=auto -mfloat-abi=softfp} "thumb/v7-r+fp.sp/softfp" + {-march=armv8-r+crc+fp.sp -mfpu=auto -mfloat-abi=hard} "thumb/v7-r+fp.sp/hard" } { check_multi_dir $opts $dir }