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Thu, 18 Jul 2024 05:36:32 GMT Received: from smtpav01.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 5A06A58059; Thu, 18 Jul 2024 05:36:30 +0000 (GMT) Received: from smtpav01.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id DC3BD5806B; Thu, 18 Jul 2024 05:36:29 +0000 (GMT) Received: from cowardly-lion.the-meissners.org (unknown [9.61.122.31]) by smtpav01.dal12v.mail.ibm.com (Postfix) with ESMTPS; Thu, 18 Jul 2024 05:36:29 +0000 (GMT) Date: Thu, 18 Jul 2024 01:36:28 -0400 From: Michael Meissner To: Michael Meissner , gcc-patches@gcc.gnu.org, Segher Boessenkool , "Kewen.Lin" , David Edelsohn , Peter Bergner Subject: [PATCH 1/2] PR target/113652, Fix failed bootstrap on ppc unrecognized opcode: `lfiwzx' with -mcpu=7450 Message-ID: Mail-Followup-To: Michael Meissner , gcc-patches@gcc.gnu.org, Segher Boessenkool , "Kewen.Lin" , David Edelsohn , Peter Bergner References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-TM-AS-GCONF: 00 X-Proofpoint-GUID: 85QU3MLDzZAT35IkSOVCorclZrKidWSk X-Proofpoint-ORIG-GUID: cvc-lvWRTH9g5EVQ70m4CpHuiOBP1BmF X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-07-18_02,2024-07-17_02,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 phishscore=0 spamscore=0 priorityscore=1501 lowpriorityscore=0 adultscore=0 malwarescore=0 mlxlogscore=999 mlxscore=0 impostorscore=0 clxscore=1015 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2407110000 definitions=main-2407180035 X-Spam-Status: No, score=-10.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_NUMSUBJECT, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org Currently, we add -mvsx when building the float128 support in libgcc. This allows us to build the float128 support on a big endian system where the default cpu is power4. While the libgcc support can be built, given there is no glibc support for float128 available. However, adding -mvsx and building the libgcc float128 support causes problems if you set the default cpu to something like a 7540, which does not have VSX support. The assembler complains that when the code does a ".machine 7450", you cannot use VSX instructions. With these patches, the float128 libgcc support is only built if the default compiler has VSX support. If somebody wanted to enable the glibc support for big endian, they would need to set the base cpu to power8 to enable building the libgcc float128 libraries. The second patch in this series fixes up the GCC testsuite so that float128 tests are only run if the compiler enables float128 by default. I built little endian compilers and there were no regressions. I built big endian compilers with the --with-cpu=power5 configure option, and I verified that none of the float128 support functions are built. I also built big endian compilers on a power9 with the --with-cpu=native configure option, and I verified that the float128 support functions were built, since the default compiler used the VSX instruction set. I verified that on both sets of big endian builds, that all of the float128 tests were skipped, since there is no support for float128 in glibc and the GCC compiler does not enable float128 on those systems. Can I check these patches into the trunk assuming the original bugzilla author says they fix the problem? 2024-07-18 Michael Meissner libgcc/ PR target/113652 * config.host (powerpc*-*-linux*): Do not add t-float128-hw or t-float128-p10-hw if the default compiler does not support float128. * config/rs6000/t-float128 (FP128_CFLAGS_SW): Do not add -mvsx when building the basic float128 support. * config/rs6000/t-float128-hw (FP128_CFLAGS_HW): Likewise. * config/rs6000/t-float128-p10-hw (FP128_3_1_CFLAGS_HW): Likewise. * configure.ac (powerpc*-*-linux*): Do not add -mvsx when testing whether to build the float128 support. * configure: Regenerate. --- libgcc/config.host | 12 ++++++------ libgcc/config/rs6000/t-float128 | 8 +++++++- libgcc/config/rs6000/t-float128-hw | 3 +-- libgcc/config/rs6000/t-float128-p10-hw | 3 +-- libgcc/configure | 8 +++++++- libgcc/configure.ac | 8 +++++++- 6 files changed, 29 insertions(+), 13 deletions(-) diff --git a/libgcc/config.host b/libgcc/config.host index 9fae51d4ce7..261b08859a4 100644 --- a/libgcc/config.host +++ b/libgcc/config.host @@ -1292,14 +1292,14 @@ powerpc*-*-linux*) if test $libgcc_cv_powerpc_float128 = yes; then tmake_file="${tmake_file} rs6000/t-float128" - fi - if test $libgcc_cv_powerpc_float128_hw = yes; then - tmake_file="${tmake_file} rs6000/t-float128-hw" - fi + if test $libgcc_cv_powerpc_float128_hw = yes; then + tmake_file="${tmake_file} rs6000/t-float128-hw" - if test $libgcc_cv_powerpc_3_1_float128_hw = yes; then - tmake_file="${tmake_file} rs6000/t-float128-p10-hw" + if test $libgcc_cv_powerpc_3_1_float128_hw = yes; then + tmake_file="${tmake_file} rs6000/t-float128-p10-hw" + fi + fi fi extra_parts="$extra_parts ecrti.o ecrtn.o ncrti.o ncrtn.o" diff --git a/libgcc/config/rs6000/t-float128 b/libgcc/config/rs6000/t-float128 index b09b5664af0..93e78adcd62 100644 --- a/libgcc/config/rs6000/t-float128 +++ b/libgcc/config/rs6000/t-float128 @@ -74,7 +74,13 @@ fp128_includes = $(srcdir)/soft-fp/double.h \ $(srcdir)/soft-fp/soft-fp.h # Build the emulator without ISA 3.0 hardware support. -FP128_CFLAGS_SW = -Wno-type-limits -mvsx -mfloat128 \ +# +# In the past we added -mvsx to build the float128 specific libraries with the +# VSX instruction set. This allowed the big endian GCC on server platforms to +# build the float128 support. However, is causes problems when other default +# cpu targets are used such as the 7450. + +FP128_CFLAGS_SW = -Wno-type-limits -mfloat128 \ -mno-float128-hardware -mno-gnu-attribute \ -I$(srcdir)/soft-fp \ -I$(srcdir)/config/rs6000 \ diff --git a/libgcc/config/rs6000/t-float128-hw b/libgcc/config/rs6000/t-float128-hw index ed67b572580..82726c98b98 100644 --- a/libgcc/config/rs6000/t-float128-hw +++ b/libgcc/config/rs6000/t-float128-hw @@ -23,8 +23,7 @@ fp128_ifunc_obj = $(fp128_ifunc_static_obj) $(fp128_ifunc_shared_obj) fp128_sed_hw = -hw # Build the hardware support functions with appropriate hardware support -FP128_CFLAGS_HW = -Wno-type-limits -mvsx -mfloat128 \ - -mcpu=power9 \ +FP128_CFLAGS_HW = -Wno-type-limits -mfloat128 -mcpu=power9 \ -mfloat128-hardware -mno-gnu-attribute \ -I$(srcdir)/soft-fp \ -I$(srcdir)/config/rs6000 \ diff --git a/libgcc/config/rs6000/t-float128-p10-hw b/libgcc/config/rs6000/t-float128-p10-hw index edaaee0e478..ee50d248ca1 100644 --- a/libgcc/config/rs6000/t-float128-p10-hw +++ b/libgcc/config/rs6000/t-float128-p10-hw @@ -13,8 +13,7 @@ fp128_3_1_hw_shared_obj = $(addsuffix _s$(objext),$(fp128_3_1_hw_funcs)) fp128_3_1_hw_obj = $(fp128_3_1_hw_static_obj) $(fp128_3_1_hw_shared_obj) # Build the hardware support functions with appropriate hardware support -FP128_3_1_CFLAGS_HW = -Wno-type-limits -mvsx -mfloat128 \ - -mcpu=power10 \ +FP128_3_1_CFLAGS_HW = -Wno-type-limits -mfloat128 -mcpu=power10 \ -mfloat128-hardware -mno-gnu-attribute \ -I$(srcdir)/soft-fp \ -I$(srcdir)/config/rs6000 \ diff --git a/libgcc/configure b/libgcc/configure index a69d314374a..635237a06c8 100755 --- a/libgcc/configure +++ b/libgcc/configure @@ -5184,9 +5184,15 @@ case ${host} in # check if we have VSX (ISA 2.06) support to build the software libraries, and # whether the assembler can handle xsaddqp for hardware support. Also check if # a new glibc is being used so that __builtin_cpu_supports can be used. +# +# with the VSX instruction set. This allowed the big endian GCC on server +# platforms to build the float128 support. However, is causes problems when +# other default cpu targets are used such as the 7450. Now +# libgcc_cv_powerpc_float128 will fail if the default cpu cannot build the +# float128 support. powerpc*-*-linux*) saved_CFLAGS="$CFLAGS" - CFLAGS="$CFLAGS -mabi=altivec -mvsx -mfloat128" + CFLAGS="$CFLAGS -mfloat128" { $as_echo "$as_me:${as_lineno-$LINENO}: checking for PowerPC ISA 2.06 to build __float128 libraries" >&5 $as_echo_n "checking for PowerPC ISA 2.06 to build __float128 libraries... " >&6; } if ${libgcc_cv_powerpc_float128+:} false; then : diff --git a/libgcc/configure.ac b/libgcc/configure.ac index c2749fe0958..2a725a6f662 100644 --- a/libgcc/configure.ac +++ b/libgcc/configure.ac @@ -407,9 +407,15 @@ case ${host} in # check if we have VSX (ISA 2.06) support to build the software libraries, and # whether the assembler can handle xsaddqp for hardware support. Also check if # a new glibc is being used so that __builtin_cpu_supports can be used. +# +# with the VSX instruction set. This allowed the big endian GCC on server +# platforms to build the float128 support. However, is causes problems when +# other default cpu targets are used such as the 7450. Now +# libgcc_cv_powerpc_float128 will fail if the default cpu cannot build the +# float128 support. powerpc*-*-linux*) saved_CFLAGS="$CFLAGS" - CFLAGS="$CFLAGS -mabi=altivec -mvsx -mfloat128" + CFLAGS="$CFLAGS -mfloat128" AC_CACHE_CHECK([for PowerPC ISA 2.06 to build __float128 libraries], [libgcc_cv_powerpc_float128], [AC_COMPILE_IFELSE(