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Thu, 14 Mar 2024 04:37:08 -0400 X-MC-Unique: j5leFlQTM5KINjnw4VwuYg-1 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.rdu2.redhat.com [10.11.54.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 5CFDB80026D; Thu, 14 Mar 2024 08:37:08 +0000 (UTC) Received: from tucnak.zalov.cz (unknown [10.45.225.36]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 20B203C21; Thu, 14 Mar 2024 08:37:07 +0000 (UTC) Received: from tucnak.zalov.cz (localhost [127.0.0.1]) by tucnak.zalov.cz (8.17.1/8.17.1) with ESMTPS id 42E8b6Lc3677581 (version=TLSv1.3 cipher=TLS_AES_256_GCM_SHA384 bits=256 verify=NOT); Thu, 14 Mar 2024 09:37:06 +0100 Received: (from jakub@localhost) by tucnak.zalov.cz (8.17.1/8.17.1/Submit) id 42E8b5dx3677580; Thu, 14 Mar 2024 09:37:05 +0100 Date: Thu, 14 Mar 2024 09:37:05 +0100 From: Jakub Jelinek To: Richard Earnshaw , Richard Sandiford , Kyrylo Tkachov Cc: gcc-patches@gcc.gnu.org Subject: [PATCH] aarch64: Fix TImode __sync_*_compare_and_exchange expansion with LSE [PR114310] Message-ID: MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.1 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Disposition: inline X-Spam-Status: No, score=-3.9 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: Jakub Jelinek Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Hi! The following testcase ICEs with LSE atomics. The problem is that the @atomic_compare_and_swap expander uses aarch64_reg_or_zero predicate for the desired operand, which is fine, given that for most of the modes and even for TImode in some cases it can handle zero immediate just fine, but the TImode @aarch64_compare_and_swap_lse just uses register_operand for that operand instead, again intentionally so, because the casp, caspa, caspl and caspal instructions need to use a pair of consecutive registers for the operand and xzr is just one register and we can't just store zero into the link register to emulate pair of zeros. So, the following patch fixes that by forcing the newval operand into a register for the TImode LSE case. Bootstrapped/regtested on aarch64-linux, ok for trunk? 2024-03-14 Jakub Jelinek PR target/114310 * config/aarch64/aarch64.cc (aarch64_expand_compare_and_swap): For TImode force newval into a register. * gcc.dg/pr114310.c: New test. Jakub --- gcc/config/aarch64/aarch64.cc.jj 2024-03-12 10:16:12.024101665 +0100 +++ gcc/config/aarch64/aarch64.cc 2024-03-13 18:55:39.147986554 +0100 @@ -24693,6 +24693,8 @@ aarch64_expand_compare_and_swap (rtx ope rval = copy_to_mode_reg (r_mode, oldval); else emit_move_insn (rval, gen_lowpart (r_mode, oldval)); + if (mode == TImode) + newval = force_reg (mode, newval); emit_insn (gen_aarch64_compare_and_swap_lse (mode, rval, mem, newval, mod_s)); --- gcc/testsuite/gcc.dg/pr114310.c.jj 2024-03-13 19:09:25.322597418 +0100 +++ gcc/testsuite/gcc.dg/pr114310.c 2024-03-13 19:08:50.802073314 +0100 @@ -0,0 +1,20 @@ +/* PR target/114310 */ +/* { dg-do run { target int128 } } */ + +volatile __attribute__((aligned (sizeof (__int128_t)))) __int128_t v = 10; + +int +main () +{ +#if __GCC_HAVE_SYNC_COMPARE_AND_SWAP_16 + if (__sync_val_compare_and_swap (&v, (__int128_t) 10, (__int128_t) 0) != 10) + __builtin_abort (); + if (__sync_val_compare_and_swap (&v, (__int128_t) 10, (__int128_t) 15) != 0) + __builtin_abort (); + if (__sync_val_compare_and_swap (&v, (__int128_t) 0, (__int128_t) 42) != 0) + __builtin_abort (); + if (__sync_val_compare_and_swap (&v, (__int128_t) 31, (__int128_t) 35) != 42) + __builtin_abort (); +#endif + return 0; +}