Message ID | ZS7zZtFfaT6+QUen@arm.com |
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State | New |
Headers | show
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Series |
aarch64: Add new load/store pair fusion pass
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expand
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Alex Coplan <alex.coplan@arm.com> writes: > The test is trying to check that we don't use q-register stores with > -mstrict-align, so actually check specifically for that. > > This is a prerequisite to avoid regressing: > > scan-assembler-not "add\tx0, x0, :" > > with the upcoming ldp fusion pass, as we change where the ldps are > formed such that a register is used rather than a symbolic (lo_sum) > address for the first load. > > Bootstrapped/regtested as a series on aarch64-linux-gnu, OK for trunk? > > gcc/testsuite/ChangeLog: > > * gcc.target/aarch64/pr71727.c: Adjust scan-assembler-not to > make sure we don't have q-register stores with -mstrict-align. OK, thanks. Richard > --- > gcc/testsuite/gcc.target/aarch64/pr71727.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/gcc/testsuite/gcc.target/aarch64/pr71727.c b/gcc/testsuite/gcc.target/aarch64/pr71727.c > index 41fa72bc67e..226258a76fe 100644 > --- a/gcc/testsuite/gcc.target/aarch64/pr71727.c > +++ b/gcc/testsuite/gcc.target/aarch64/pr71727.c > @@ -30,4 +30,4 @@ _start (void) > } > > /* { dg-final { scan-assembler-times "mov\tx" 5 {target lp64} } } */ > -/* { dg-final { scan-assembler-not "add\tx0, x0, :" {target lp64} } } */ > +/* { dg-final { scan-assembler-not {st[rp]\tq[0-9]+} {target lp64} } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/pr71727.c b/gcc/testsuite/gcc.target/aarch64/pr71727.c index 41fa72bc67e..226258a76fe 100644 --- a/gcc/testsuite/gcc.target/aarch64/pr71727.c +++ b/gcc/testsuite/gcc.target/aarch64/pr71727.c @@ -30,4 +30,4 @@ _start (void) } /* { dg-final { scan-assembler-times "mov\tx" 5 {target lp64} } } */ -/* { dg-final { scan-assembler-not "add\tx0, x0, :" {target lp64} } } */ +/* { dg-final { scan-assembler-not {st[rp]\tq[0-9]+} {target lp64} } } */