diff mbox series

i386: Remove ndd support for *add<mode>_4 [PR113744]

Message ID DM4PR11MB5487F2DD15413D8638D27793ECB12@DM4PR11MB5487.namprd11.prod.outlook.com
State New
Headers show
Series i386: Remove ndd support for *add<mode>_4 [PR113744] | expand

Commit Message

Kong, Lingling July 31, 2024, 6:07 a.m. UTC 
*add<mode>_4 and *adddi_4 are for shorter opcode from cmp to inc/dec or add $128.
But NDD code is longer than the cmp code, so there is no need to support NDD.


Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}.

Ok for trunk?

gcc/ChangeLog:

               PR target/113744
               * config/i386/i386.md (*add<mode>_4): Remove NDD support.
               (*adddi_4): Ditto.

Co-Authored-By: Hu, Lin1 lin1.hu@intel.com<mailto:lin1.hu@intel.com>
---
gcc/config/i386/i386.md | 40 +++++++++++++++-------------------------
1 file changed, 15 insertions(+), 25 deletions(-)

   [(set (reg FLAGS_REG)
              (compare
-                (match_operand:SWI124 1 "nonimmediate_operand" "0,rm")
+               (match_operand:SWI124 1 "nonimmediate_operand" "0")
                (match_operand:SWI124 2 "const_int_operand")))
-   (clobber (match_scratch:SWI124 0 "=<r>,r"))]
+   (clobber (match_scratch:SWI124 0 "=<r>"))]
   "ix86_match_ccmode (insn, CCGCmode)"
{
-  bool use_ndd = get_attr_isa (insn) == ISA_APX_NDD;
   switch (get_attr_type (insn))
     {
     case TYPE_INCDEC:
       if (operands[2] == constm1_rtx)
-        return use_ndd ? "inc{<imodesuffix>}\t{%1, %0|%0, %1}"
-                                    : "inc{<imodesuffix>}\t%0";
+        return "inc{<imodesuffix>}\t%0";
       else
         {
                gcc_assert (operands[2] == const1_rtx);
-                return use_ndd ? "dec{<imodesuffix>}\t{%1, %0|%0, %1}"
-                                            : "dec{<imodesuffix>}\t%0";
+               return "dec{<imodesuffix>}\t%0";
              }
     default:
       if (x86_maybe_negate_const_int (&operands[2], <MODE>mode))
-              return use_ndd ? "add{<imodesuffix>}\t{%2, %1, %0|%0, %1, %2}"
-                                    : "add{<imodesuffix>}\t{%2, %0|%0, %2}";
+             return "add{<imodesuffix>}\t{%2, %0|%0, %2}";
-      return use_ndd ? "sub{<imodesuffix>}\t{%2, %1, %0|%0, %1, %2}"
-                                  : "sub{<imodesuffix>}\t{%2, %0|%0, %2}";
+      return "sub{<imodesuffix>}\t{%2, %0|%0, %2}";
     }
}
-  [(set_attr "isa" "*,apx_ndd")
-   (set (attr "type")
+  [(set (attr "type")
      (if_then_else (match_operand:<MODE> 2 "incdec_operand")
              (const_string "incdec")
              (const_string "alu")))
--
2.31.1

Comments

Hongtao Liu July 31, 2024, 6:45 a.m. UTC | #1 
On Wed, Jul 31, 2024 at 2:08 PM Kong, Lingling <lingling.kong@intel.com> wrote:
>
> *add<mode>_4 and *adddi_4 are for shorter opcode from cmp to inc/dec or add $128.
>
> But NDD code is longer than the cmp code, so there is no need to support NDD.
>
>
>
> Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}.
>
> Ok for trunk?
Ok.
>
>
>
> gcc/ChangeLog:
>
>
>
>                PR target/113744
>
>                * config/i386/i386.md (*add<mode>_4): Remove NDD support.
>
>                (*adddi_4): Ditto.
>
>
>
> Co-Authored-By: Hu, Lin1 lin1.hu@intel.com
>
> ---
>
> gcc/config/i386/i386.md | 40 +++++++++++++++-------------------------
>
> 1 file changed, 15 insertions(+), 25 deletions(-)
>
>
>
> diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
>
> index fb10fdc9f96..3c293c14656 100644
>
> --- a/gcc/config/i386/i386.md
>
> +++ b/gcc/config/i386/i386.md
>
> @@ -7146,35 +7146,31 @@
>
> (define_insn "*adddi_4"
>
>    [(set (reg FLAGS_REG)
>
>               (compare
>
> -                (match_operand:DI 1 "nonimmediate_operand" "0,rm")
>
> -                (match_operand:DI 2 "x86_64_immediate_operand" "e,e")))
>
> -   (clobber (match_scratch:DI 0 "=r,r"))]
>
> +               (match_operand:DI 1 "nonimmediate_operand" "0")
>
> +               (match_operand:DI 2 "x86_64_immediate_operand" "e")))
>
> +   (clobber (match_scratch:DI 0 "=r"))]
>
>    "TARGET_64BIT
>
>     && ix86_match_ccmode (insn, CCGCmode)"
>
> {
>
> -  bool use_ndd = get_attr_isa (insn) == ISA_APX_NDD;
>
>    switch (get_attr_type (insn))
>
>      {
>
>      case TYPE_INCDEC:
>
>        if (operands[2] == constm1_rtx)
>
> -        return use_ndd ? "inc{q}\t{%1, %0|%0, %1}" : "inc{q}\t%0";
>
> +             return "inc{q}\t%0";
>
>        else
>
>          {
>
>                 gcc_assert (operands[2] == const1_rtx);
>
> -                return use_ndd ? "dec{q}\t{%1, %0|%0, %1}" : "dec{q}\t%0";
>
> +               return "dec{q}\t%0";
>
>               }
>
>      default:
>
>        if (x86_maybe_negate_const_int (&operands[2], DImode))
>
> -              return use_ndd ? "add{q}\t{%2, %1, %0|%0, %1, %2}"
>
> -                                    : "add{q}\t{%2, %0|%0, %2}";
>
> +             return "add{q}\t{%2, %0|%0, %2}";
>
> -      return use_ndd ? "sub{q}\t{%2, %1, %0|%0, %1, %2}"
>
> -                                  : "sub{q}\t{%2, %0|%0, %2}";
>
> +      return "sub{q}\t{%2, %0|%0, %2}";
>
>      }
>
> }
>
> -  [(set_attr "isa" "*,apx_ndd")
>
> -   (set (attr "type")
>
> +  [(set (attr "type")
>
>       (if_then_else (match_operand:DI 2 "incdec_operand")
>
>               (const_string "incdec")
>
>               (const_string "alu")))
>
> @@ -7195,36 +7191,30 @@
>
> (define_insn "*add<mode>_4"
>
>    [(set (reg FLAGS_REG)
>
>               (compare
>
> -                (match_operand:SWI124 1 "nonimmediate_operand" "0,rm")
>
> +               (match_operand:SWI124 1 "nonimmediate_operand" "0")
>
>                 (match_operand:SWI124 2 "const_int_operand")))
>
> -   (clobber (match_scratch:SWI124 0 "=<r>,r"))]
>
> +   (clobber (match_scratch:SWI124 0 "=<r>"))]
>
>    "ix86_match_ccmode (insn, CCGCmode)"
>
> {
>
> -  bool use_ndd = get_attr_isa (insn) == ISA_APX_NDD;
>
>    switch (get_attr_type (insn))
>
>      {
>
>      case TYPE_INCDEC:
>
>        if (operands[2] == constm1_rtx)
>
> -        return use_ndd ? "inc{<imodesuffix>}\t{%1, %0|%0, %1}"
>
> -                                    : "inc{<imodesuffix>}\t%0";
>
> +        return "inc{<imodesuffix>}\t%0";
>
>        else
>
>          {
>
>                 gcc_assert (operands[2] == const1_rtx);
>
> -                return use_ndd ? "dec{<imodesuffix>}\t{%1, %0|%0, %1}"
>
> -                                            : "dec{<imodesuffix>}\t%0";
>
> +               return "dec{<imodesuffix>}\t%0";
>
>               }
>
>      default:
>
>        if (x86_maybe_negate_const_int (&operands[2], <MODE>mode))
>
> -              return use_ndd ? "add{<imodesuffix>}\t{%2, %1, %0|%0, %1, %2}"
>
> -                                    : "add{<imodesuffix>}\t{%2, %0|%0, %2}";
>
> +             return "add{<imodesuffix>}\t{%2, %0|%0, %2}";
>
> -      return use_ndd ? "sub{<imodesuffix>}\t{%2, %1, %0|%0, %1, %2}"
>
> -                                  : "sub{<imodesuffix>}\t{%2, %0|%0, %2}";
>
> +      return "sub{<imodesuffix>}\t{%2, %0|%0, %2}";
>
>      }
>
> }
>
> -  [(set_attr "isa" "*,apx_ndd")
>
> -   (set (attr "type")
>
> +  [(set (attr "type")
>
>       (if_then_else (match_operand:<MODE> 2 "incdec_operand")
>
>               (const_string "incdec")
>
>               (const_string "alu")))
>
> --
>
> 2.31.1
diff mbox series

Patch

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index fb10fdc9f96..3c293c14656 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -7146,35 +7146,31 @@ 
(define_insn "*adddi_4"
   [(set (reg FLAGS_REG)
              (compare
-                (match_operand:DI 1 "nonimmediate_operand" "0,rm")
-                (match_operand:DI 2 "x86_64_immediate_operand" "e,e")))
-   (clobber (match_scratch:DI 0 "=r,r"))]
+               (match_operand:DI 1 "nonimmediate_operand" "0")
+               (match_operand:DI 2 "x86_64_immediate_operand" "e")))
+   (clobber (match_scratch:DI 0 "=r"))]
   "TARGET_64BIT
    && ix86_match_ccmode (insn, CCGCmode)"
{
-  bool use_ndd = get_attr_isa (insn) == ISA_APX_NDD;
   switch (get_attr_type (insn))
     {
     case TYPE_INCDEC:
       if (operands[2] == constm1_rtx)
-        return use_ndd ? "inc{q}\t{%1, %0|%0, %1}" : "inc{q}\t%0";
+             return "inc{q}\t%0";
       else
         {
                gcc_assert (operands[2] == const1_rtx);
-                return use_ndd ? "dec{q}\t{%1, %0|%0, %1}" : "dec{q}\t%0";
+               return "dec{q}\t%0";
              }
     default:
       if (x86_maybe_negate_const_int (&operands[2], DImode))
-              return use_ndd ? "add{q}\t{%2, %1, %0|%0, %1, %2}"
-                                    : "add{q}\t{%2, %0|%0, %2}";
+             return "add{q}\t{%2, %0|%0, %2}";
-      return use_ndd ? "sub{q}\t{%2, %1, %0|%0, %1, %2}"
-                                  : "sub{q}\t{%2, %0|%0, %2}";
+      return "sub{q}\t{%2, %0|%0, %2}";
     }
}
-  [(set_attr "isa" "*,apx_ndd")
-   (set (attr "type")
+  [(set (attr "type")
      (if_then_else (match_operand:DI 2 "incdec_operand")
              (const_string "incdec")
              (const_string "alu")))
@@ -7195,36 +7191,30 @@ 
(define_insn "*add<mode>_4"