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(*3_1_nf): Ditto. gcc/testsuite/ChangeLog: * gcc.target/i386/apx-nf.c: Add NF test for rotate insns. --- gcc/config/i386/i386.md | 59 +++++++++++++++++--------- gcc/testsuite/gcc.target/i386/apx-nf.c | 5 +++ 2 files changed, 43 insertions(+), 21 deletions(-) diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index d10caf04fcc..9d518e90d07 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -16245,19 +16245,19 @@ (define_mode_attr cvt_mnemonic [(SI "{cltd|cdq}") (DI "{cqto|cqo}")]) -(define_insn "ashr3_cvt" +(define_insn "ashr3_cvt" [(set (match_operand:SWI48 0 "nonimmediate_operand" "=*d,rm,r") (ashiftrt:SWI48 (match_operand:SWI48 1 "nonimmediate_operand" "*a,0,rm") - (match_operand:QI 2 "const_int_operand"))) - (clobber (reg:CC FLAGS_REG))] + (match_operand:QI 2 "const_int_operand")))] "INTVAL (operands[2]) == GET_MODE_BITSIZE (mode)-1 && (TARGET_USE_CLTD || optimize_function_for_size_p (cfun)) - && ix86_binary_operator_ok (ASHIFTRT, mode, operands, TARGET_APX_NDD)" + && ix86_binary_operator_ok (ASHIFTRT, mode, operands, TARGET_APX_NDD) + && " "@ - sar{}\t{%2, %0|%0, %2} - sar{}\t{%2, %1, %0|%0, %1, %2}" + sar{}\t{%2, %0|%0, %2} + sar{}\t{%2, %1, %0|%0, %1, %2}" [(set_attr "isa" "*,*,apx_ndd") (set_attr "type" "imovx,ishift,ishift") (set_attr "prefix_0f" "0,*,*") @@ -17109,28 +17109,31 @@ [(set_attr "type" "rotatex") (set_attr "mode" "")]) -(define_insn "*3_1" +(define_insn "*3_1" [(set (match_operand:SWI48 0 "nonimmediate_operand" "=rm,r,r") (any_rotate:SWI48 (match_operand:SWI48 1 "nonimmediate_operand" "0,rm,rm") - (match_operand:QI 2 "nonmemory_operand" "c,,c"))) - (clobber (reg:CC FLAGS_REG))] - "ix86_binary_operator_ok (, mode, operands, TARGET_APX_NDD)" + (match_operand:QI 2 "nonmemory_operand" "c,,c")))] + "ix86_binary_operator_ok (, mode, operands, TARGET_APX_NDD) + && " { bool use_ndd = get_attr_isa (insn) == ISA_APX_NDD; switch (get_attr_type (insn)) { case TYPE_ROTATEX: - return "#"; + if (TARGET_APX_NDD && ) + return "%{nf%} {}\t{%2, %1, %0|%0, %1, %2}"; + else + return "#"; default: if (operands[2] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun)) - && !use_ndd) + && !use_ndd && !) return "{}\t%0"; else - return use_ndd ? "{}\t{%2, %1, %0|%0, %1, %2}" - : "{}\t{%2, %0|%0, %2}"; + return use_ndd ? "{}\t{%2, %1, %0|%0, %1, %2}" + : "{}\t{%2, %0|%0, %2}"; } } [(set_attr "isa" "*,bmi2,apx_ndd") @@ -17164,6 +17167,20 @@ operands[2] = GEN_INT ((bitsize - INTVAL (operands[2])) % bitsize); }) +(define_split + [(set (match_operand:SWI48 0 "register_operand") + (rotate:SWI48 (match_operand:SWI48 1 "nonimmediate_operand") + (match_operand:QI 2 "const_int_operand")))] + "TARGET_BMI2 && reload_completed && !optimize_function_for_size_p (cfun) + && !TARGET_APX_NDD" + [(set (match_dup 0) + (rotatert:SWI48 (match_dup 1) (match_dup 2)))] +{ + int bitsize = GET_MODE_BITSIZE (mode); + + operands[2] = GEN_INT ((bitsize - INTVAL (operands[2])) % bitsize); +}) + (define_split [(set (match_operand:SWI48 0 "register_operand") (rotatert:SWI48 (match_operand:SWI48 1 "nonimmediate_operand") @@ -17251,22 +17268,22 @@ [(set (match_dup 0) (zero_extend:DI (rotatert:SI (match_dup 1) (match_dup 2))))]) -(define_insn "*3_1" +(define_insn "*3_1" [(set (match_operand:SWI12 0 "nonimmediate_operand" "=m,r") (any_rotate:SWI12 (match_operand:SWI12 1 "nonimmediate_operand" "0,rm") - (match_operand:QI 2 "nonmemory_operand" "c,c"))) - (clobber (reg:CC FLAGS_REG))] - "ix86_binary_operator_ok (, mode, operands, TARGET_APX_NDD)" + (match_operand:QI 2 "nonmemory_operand" "c,c")))] + "ix86_binary_operator_ok (, mode, operands, TARGET_APX_NDD) + && " { bool use_ndd = get_attr_isa (insn) == ISA_APX_NDD; if (operands[2] == const1_rtx && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun)) - && !use_ndd) + && !use_ndd && !) return "{}\t%0"; else return use_ndd - ? "{}\t{%2, %1, %0|%0, %1, %2}" - : "{}\t{%2, %0|%0, %2}"; + ? "{}\t{%2, %1, %0|%0, %1, %2}" + : "{}\t{%2, %0|%0, %2}"; } [(set_attr "isa" "*,apx_ndd") (set_attr "type" "rotate") diff --git a/gcc/testsuite/gcc.target/i386/apx-nf.c b/gcc/testsuite/gcc.target/i386/apx-nf.c index f33a994f0b7..ed859b399b8 100644 --- a/gcc/testsuite/gcc.target/i386/apx-nf.c +++ b/gcc/testsuite/gcc.target/i386/apx-nf.c @@ -2,6 +2,7 @@ /* { dg-options "-mapx-features=egpr,push2pop2,ndd,ppx,nf -march=x86-64 -O2" } */ /* { dg-final { scan-assembler-times "\{nf\} and" 1 } } */ /* { dg-final { scan-assembler-times "\{nf\} or" 1 } } */ +/* { dg-final { scan-assembler-times "\{nf\} rol" 4 } } */ struct B { unsigned bit0 : 1; unsigned bit1 : 1; }; @@ -10,3 +11,7 @@ foo (struct B *b) { b->bit0 = b->bit0 | b->bit1; } +long int f1 (int x) { return ~(1ULL << (x & 0x3f)); } +long int f2 (int x) { return ~(1ULL << x); } +long int f3 (unsigned char *x) { return ~(1ULL << (x[0] & 0x3f)); } +long int f4 (unsigned char *x) { return ~(1ULL << x[0]); }