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Mon, 2 Sep 2024 13:09:56 +0000 Received: from DBBPR83MB0613.EURPRD83.prod.outlook.com ([fe80::399d:9bfc:1209:af10]) by DBBPR83MB0613.EURPRD83.prod.outlook.com ([fe80::399d:9bfc:1209:af10%4]) with mapi id 15.20.7918.000; Mon, 2 Sep 2024 13:09:56 +0000 From: Evgeny Karpov To: "gcc-patches@gcc.gnu.org" CC: "richard.sandiford@arm.com" , "Richard Earnshaw (lists)" , "christophe.lyon@linaro.org" , Maxim Kuvyrkov , Radek Barton Subject: [PATCH v1 6/9] aarch64: Use symbols without offset to prevent relocation issues Thread-Topic: [PATCH v1 6/9] aarch64: Use symbols without offset to prevent relocation issues Thread-Index: AQHa/Tlnr4q5inuyT0en4f9X4+zQ4g== Date: Mon, 2 Sep 2024 13:09:55 +0000 Message-ID: References: In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: msip_labels: MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_Enabled=True; MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_SiteId=72f988bf-86f1-41af-91ab-2d7cd011db47; MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_SetDate=2024-09-02T13:09:56.138Z; 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"symbol + offset" cannot be used in relocations for aarch64-w64-mingw32 due to relocation requirements. Instead, it will adjust the address by an offset with the "add" instruction. gcc/ChangeLog: * config/aarch64/aarch64.cc (aarch64_load_symref_and_add_offset): New. (aarch64_expand_mov_immediate): Use aarch64_load_symref_and_add_offset. --- gcc/config/aarch64/aarch64.cc | 24 ++++++++++++++++++++---- 1 file changed, 20 insertions(+), 4 deletions(-) diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc index 7865484860b..1d88814f28d 100644 --- a/gcc/config/aarch64/aarch64.cc +++ b/gcc/config/aarch64/aarch64.cc @@ -4887,6 +4887,17 @@ aarch64_split_add_offset (scalar_int_mode mode, rtx dest, rtx src, temp1, temp2, 0, false); } +static void +aarch64_load_symref_and_add_offset (scalar_int_mode mode, rtx dest, rtx src, + poly_int64 offset) +{ + gcc_assert (can_create_pseudo_p ()); + src = aarch64_force_temporary (mode, dest, src); + aarch64_add_offset (mode, dest, src, offset, + NULL_RTX, NULL_RTX, 0, false); +} + + /* Add DELTA to the stack pointer, marking the instructions frame-related. TEMP1 is available as a temporary if nonnull. FORCE_ISA_MODE is as for aarch64_add_offset. EMIT_MOVE_IMM is false if TEMP1 already @@ -6054,10 +6065,8 @@ aarch64_expand_mov_immediate (rtx dest, rtx imm) case SYMBOL_TINY_TLSIE: if (const_offset != 0) { - gcc_assert(can_create_pseudo_p ()); - base = aarch64_force_temporary (int_mode, dest, base); - aarch64_add_offset (int_mode, dest, base, const_offset, - NULL_RTX, NULL_RTX, 0, false); + aarch64_load_symref_and_add_offset (int_mode, dest, base, + const_offset); return; } /* FALLTHRU */ @@ -6068,6 +6077,13 @@ aarch64_expand_mov_immediate (rtx dest, rtx imm) case SYMBOL_TLSLE24: case SYMBOL_TLSLE32: case SYMBOL_TLSLE48: + if (TARGET_PECOFF && const_offset != 0) + { + aarch64_load_symref_and_add_offset (int_mode, dest, base, + const_offset); + return; + } + aarch64_load_symref_appropriately (dest, imm, sty); return;