From patchwork Wed Oct 22 22:04:26 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Evgeny Stupachenko X-Patchwork-Id: 402302 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 0425814007D for ; Thu, 23 Oct 2014 09:04:38 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:in-reply-to:references:date:message-id:subject :from:to:cc:content-type; q=dns; s=default; b=LsGnVir8Kh+YcVcZjY DHyA++98ffSS+KCL4Fb+c4IfI1wZWMewHTWPmnWGLIsnPqAPnE4fDLbVtz+w6qsr hVs/ZVeDH21HtXFwwJX84TzlUvEGxbK0NtDKt5lbT4DeUKazeDRwlZ6+nLRO9Wms DKTVnK0W6gG9Drihwf3TZv0eo= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:in-reply-to:references:date:message-id:subject :from:to:cc:content-type; s=default; bh=H4af/izavXP8umc036fHKoMU d1g=; b=d5fU/KeyTkD9URKs5lEGrkaKpl8nGwMnynwO9iQm64Gc1euKQ32sd9/M 3XwXlkJPcj6ts7TyW4X36qNC8DzIUmyq+xhaunc1GxrecoF9GH3v45HegbQ16tAv xc/H3ABqxgIKztTionyvlbLxHeIMP8DiXgYbZFOM1sQp6h0men4= Received: (qmail 28491 invoked by alias); 22 Oct 2014 22:04:32 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 28474 invoked by uid 89); 22 Oct 2014 22:04:31 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.5 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 X-Spam-User: qpsmtpd, 2 recipients X-HELO: mail-ig0-f182.google.com Received: from mail-ig0-f182.google.com (HELO mail-ig0-f182.google.com) (209.85.213.182) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Wed, 22 Oct 2014 22:04:30 +0000 Received: by mail-ig0-f182.google.com with SMTP id hn18so326243igb.9 for ; Wed, 22 Oct 2014 15:04:28 -0700 (PDT) MIME-Version: 1.0 X-Received: by 10.42.53.80 with SMTP id m16mr6994459icg.43.1414015466298; Wed, 22 Oct 2014 15:04:26 -0700 (PDT) Received: by 10.107.6.95 with HTTP; Wed, 22 Oct 2014 15:04:26 -0700 (PDT) In-Reply-To: <544822EE.7090709@redhat.com> References: <544822EE.7090709@redhat.com> Date: Thu, 23 Oct 2014 02:04:26 +0400 Message-ID: Subject: Re: [PATCH 2/2, x86, PR63534] Fix darwin bootstrap From: Evgeny Stupachenko To: Jakub Jelinek Cc: GCC Patches , Jeff Law , Uros Bizjak , iains@gcc.gnu.org X-IsSubscribed: yes >What is ia32 specific on the test? Just the fact the test fails on ia32 now, for 64 bit the test is very simple, however we can test it as well. Full patch with testcase: 2014-10-22 Evgeny Stupachenko PR target/63534 PR target/63618 * cse.c (delete_trivially_dead_insns): Consider PIC register is used while it is pseudo. * dse.c (deletable_insn_p): Likewise. * gcc.target/i386/pr63618.c: New test. On Wed, Oct 22, 2014 at 8:01 PM, Jakub Jelinek wrote: > On Wed, Oct 22, 2014 at 07:55:57PM +0400, Evgeny Stupachenko wrote: >> There is a test for Linux x86 that also fails without the changes in the patch: >> >> ChangeLog: >> >> 2014-10-22 Evgeny Stupachenko >> >> PR rtl-optimization/63618 >> * gcc.target/i386/pr63618.c: New. >> >> diff --git a/gcc/testsuite/gcc.target/i386/pr63618.c >> b/gcc/testsuite/gcc.target/i386/pr63618.c >> new file mode 100644 >> index 0000000..cf10a2b >> --- /dev/null >> +++ b/gcc/testsuite/gcc.target/i386/pr63618.c >> @@ -0,0 +1,34 @@ >> +/* PR rtl-optimization/63618 */ >> +/* { dg-do run } */ >> +/* { dg-require-effective-target sse4 } */ >> +/* { dg-require-effective-target ia32 } */ >> +/* { dg-options "-O2 -msse4.2 -mtune=corei7 -fno-inline -fPIC" } */ > > What is ia32 specific on the test? > As for -msse4.2 and sse4 effective target, I'd say > better would be to stick that to > /* { dg-additional-options "-msse4.2" { target sse4 } } */ > Similarly, you want -fPIC only if { target fpic }, thus I'd say you want to > start the test with: > /* { dg-do run } */ > /* { dg-options "-O2 -mtune=corei7 -fno-inline" } */ > /* { dg-additional-options "-msse4.2" { target sse4 } } */ > /* { dg-additional-options "-fpic" { target fpic } } */ > > Jakub diff --git a/gcc/cse.c b/gcc/cse.c index be2f31b..92e6bf8 100644 --- a/gcc/cse.c +++ b/gcc/cse.c @@ -6953,6 +6953,12 @@ delete_trivially_dead_insns (rtx_insn *insns, int nreg) /* If no debug insns can be present, COUNTS is just an array which counts how many times each pseudo is used. */ } + /* Pseudo PIC register should be considered as used due to possible + new usages generated. */ + if (!reload_completed + && pic_offset_table_rtx + && REGNO (pic_offset_table_rtx) >= FIRST_PSEUDO_REGISTER) + counts[REGNO (pic_offset_table_rtx)]++; /* Go from the last insn to the first and delete insns that only set unused registers or copy a register to itself. As we delete an insn, remove usage counts for registers it uses. diff --git a/gcc/dce.c b/gcc/dce.c index 5b7d36e..9a9d334 100644 --- a/gcc/dce.c +++ b/gcc/dce.c @@ -127,6 +127,11 @@ deletable_insn_p (rtx_insn *insn, bool fast, bitmap arg_stores) if (HARD_REGISTER_NUM_P (DF_REF_REGNO (def)) && global_regs[DF_REF_REGNO (def)]) return false; + /* Initialization of pseudo PIC register should never be removed. */ + else if (!reload_completed + && DF_REF_REG (def) == pic_offset_table_rtx + && REGNO (pic_offset_table_rtx) >= FIRST_PSEUDO_REGISTER) + return false; body = PATTERN (insn); switch (GET_CODE (body)) diff --git a/gcc/testsuite/gcc.target/i386/pr63618.c b/gcc/testsuite/gcc.target/i386/pr63618.c new file mode 100644 index 0000000..2075071 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr63618.c @@ -0,0 +1,34 @@ +/* PR target/63618 */ +/* { dg-do run } */ +/* { dg-options "-O2 -mtune=corei7 -fno-inline" } */ +/* { dg-additional-options "-msse4.2" { target sse4 } } */ +/* { dg-additional-options "-fpic" { target fpic } } */ + +static const __float128 cf = 0.1E+10Q; + +__float128 +f128_square(__float128 x) +{ + return x * x; +} + +__float128 +f128_p3(__float128 x) +{ + return x * x * x; +} + +__float128 +cond_f128_square (__float128 x, int p) +{ + x = f128_p3 (x); + if (p) + x = f128_square(cf); + return x; +} + +int main() +{ + __float128 x = cond_f128_square (cf, 1); + return (int)(x < cf); +}