From patchwork Fri Aug 14 08:26:18 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hongtao Liu X-Patchwork-Id: 1344723 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=gcc.gnu.org Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=yhD9WNW9; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4BSc2y2ryLz9sPf for ; Fri, 14 Aug 2020 18:26:02 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 3E47A386EC59; Fri, 14 Aug 2020 08:26:00 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 3E47A386EC59 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1597393560; bh=1iZtt1Ee0uU7jg6IRSc65EzlJGx6O894QudrSXzaDuc=; h=Date:Subject:To:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=yhD9WNW9W1TRKSbo4IJO1xAr/yeLuGVu0giYOeIsuYTC9HqQNqdH95U3B4liarwAY cevuLYhA4Um9ExpcjvqfWTO4q6i9t6yySJ2G4ppu6Cvx0Ybo3kBobMulNkdBXryXoy uLqUkdmAGt231/tN0aR27dv+vnXpX/27vq7V2ZyM= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-ua1-x92d.google.com (mail-ua1-x92d.google.com [IPv6:2607:f8b0:4864:20::92d]) by sourceware.org (Postfix) with ESMTPS id 127033850427 for ; Fri, 14 Aug 2020 08:25:58 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 127033850427 Received: by mail-ua1-x92d.google.com with SMTP id e20so2436394uav.3 for ; Fri, 14 Aug 2020 01:25:58 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:from:date:message-id:subject:to:cc; bh=1iZtt1Ee0uU7jg6IRSc65EzlJGx6O894QudrSXzaDuc=; b=RcqCRjxtRlKAh0Bov+RU8OymDIf1nXjo3eZNVVl5Rucdfxw3N0oItuPV5v7XmPN49h EZmsZGXN4GZPtEt0H+eUdK4KYk+3otrJ7Gv5vKxC4iEUXt+TXY/co2Mio+wBEgag2E2P fCx6V14eCOiK/PrwFmbHsf34eFDl7uVgEh9RfC/nB5zX2+6QWIBprgTZVmprT/mHFxyf vzPO2tYtfGGIBQfD8BDqBvH8SooqSuvdOOr80N5YmR2Zq3yvFj98syTEc+UMlLsQwXzj I4+IhcrQCkp2doJJB93ZffLD+sAx5Z/w+aah/Ck5evnH44/PmMrDbwDVYP9U1ZUL1A8H 5G1Q== X-Gm-Message-State: AOAM53391hZHTQ/YaUmt3CLQQXEcO4WSwGLb7y+VxvP6ecALriaw8D4s OtEKe3y0AoTworvNtoBI6TuMNr+Wa4E0aQzgByvXqUoGarHYtQ== X-Google-Smtp-Source: ABdhPJyWrlc8NoGHavzpX+4akxHENWnmyMsGGCAHG0lgL6/ERyzbQyL6k8lBKdvzELJpEWDIwEvcAOp+MCSfpJGlXuc= X-Received: by 2002:ab0:7841:: with SMTP id y1mr576337uaq.102.1597393557561; Fri, 14 Aug 2020 01:25:57 -0700 (PDT) MIME-Version: 1.0 Date: Fri, 14 Aug 2020 16:26:18 +0800 Message-ID: Subject: [PATCH 3/4][PR target/88808]Enable bitwise operator for AVX512 masks. To: GCC Patches , Uros Bizjak , Kirill Yukhin X-Spam-Status: No, score=-9.5 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Hongtao Liu via Gcc-patches From: Hongtao Liu Reply-To: Hongtao Liu Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" 1. Set cost of movement inside mask registers a bit higher than gpr's. 2. Set cost of movement between mask register and gpr much higher than movement inside gpr, but still less equal than load/store. 3. Set cost of mask register load/store a bit higher than gpr load/store. From 5342006fea6b9f2b863590b400e73340c5dff21a Mon Sep 17 00:00:00 2001 From: liuhongt Date: Thu, 24 Oct 2019 11:13:00 +0800 Subject: [PATCH 3/4] According to instruction_tables.pdf 1. Set cost of movement inside mask registers a bit higher than gpr's. 2. Set cost of movement between mask register and gpr much higher than movement inside gpr, but still less equal than load/store. 3. Set cost of mask register load/store a bit higher than gpr load/store. --- gcc/config/i386/x86-tune-costs.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/gcc/config/i386/x86-tune-costs.h b/gcc/config/i386/x86-tune-costs.h index 256c84e364e..a782a9dd9e3 100644 --- a/gcc/config/i386/x86-tune-costs.h +++ b/gcc/config/i386/x86-tune-costs.h @@ -1727,12 +1727,12 @@ struct processor_costs skylake_cost = { {8, 8, 8, 12, 24}, /* cost of storing SSE registers in 32,64,128,256 and 512-bit */ 6, 6, /* SSE->integer and integer->SSE moves */ - 2, 2, /* mask->integer and integer->mask moves */ - {4, 4, 4}, /* cost of loading mask register + 4, 6, /* mask->integer and integer->mask moves */ + {6, 6, 6}, /* cost of loading mask register in QImode, HImode, SImode. */ - {6, 6, 6}, /* cost if storing mask register + {8, 8, 8}, /* cost if storing mask register in QImode, HImode, SImode. */ - 2, /* cost of moving mask register. */ + 3, /* cost of moving mask register. */ /* End of register allocator costs. */ }, -- 2.18.1