diff --git a/gcc/config/i386/i386-expand.c b/gcc/config/i386/i386-expand.c
index 06ed1078ca46..9f9069a5fb96 100644
--- a/gcc/config/i386/i386-expand.c
+++ b/gcc/config/i386/i386-expand.c
@@ -5380,8 +5380,7 @@ ix86_split_long_move (rtx operands[])
 	  if (nparts == 3)
 	    {
 	      if (TARGET_128BIT_LONG_DOUBLE && mode == XFmode)
-                emit_insn (ix86_gen_add3 (stack_pointer_rtx,
-					  stack_pointer_rtx, GEN_INT (-4)));
+                emit_insn (gen_add2_insn (stack_pointer_rtx, GEN_INT (-4)));
 	      emit_move_insn (part[0][2], part[1][2]);
 	    }
 	  else if (nparts == 4)
@@ -7789,7 +7788,7 @@ ix86_expand_strlensi_unroll_1 (rtx out, rtx src, rtx align_rtx)
 			       QImode, 1, end_0_label);
 
       /* Increment the address.  */
-      emit_insn (ix86_gen_add3 (out, out, const1_rtx));
+      emit_insn (gen_add2_insn (out, const1_rtx));
 
       /* Not needed with an alignment of 2 */
       if (align != 2)
@@ -7799,7 +7798,7 @@ ix86_expand_strlensi_unroll_1 (rtx out, rtx src, rtx align_rtx)
 	  emit_cmp_and_jump_insns (mem, const0_rtx, EQ, NULL, QImode, 1,
 				   end_0_label);
 
-	  emit_insn (ix86_gen_add3 (out, out, const1_rtx));
+	  emit_insn (gen_add2_insn (out, const1_rtx));
 
 	  emit_label (align_3_label);
 	}
@@ -7807,7 +7806,7 @@ ix86_expand_strlensi_unroll_1 (rtx out, rtx src, rtx align_rtx)
       emit_cmp_and_jump_insns (mem, const0_rtx, EQ, NULL, QImode, 1,
 			       end_0_label);
 
-      emit_insn (ix86_gen_add3 (out, out, const1_rtx));
+      emit_insn (gen_add2_insn (out, const1_rtx));
     }
 
   /* Generate loop to check 4 bytes at a time.  It is not a good idea to
@@ -7817,7 +7816,7 @@ ix86_expand_strlensi_unroll_1 (rtx out, rtx src, rtx align_rtx)
 
   mem = change_address (src, SImode, out);
   emit_move_insn (scratch, mem);
-  emit_insn (ix86_gen_add3 (out, out, GEN_INT (4)));
+  emit_insn (gen_add2_insn (out, GEN_INT (4)));
 
   /* This formula yields a nonzero result iff one of the bytes is zero.
      This saves three branches inside loop and many cycles.  */
@@ -7871,7 +7870,7 @@ ix86_expand_strlensi_unroll_1 (rtx out, rtx src, rtx align_rtx)
 
        /* Not in the first two.  Move two bytes forward.  */
        emit_insn (gen_lshrsi3 (tmpreg, tmpreg, GEN_INT (16)));
-       emit_insn (ix86_gen_add3 (out, out, const2_rtx));
+       emit_insn (gen_add2_insn (out, const2_rtx));
 
        emit_label (end_2_label);
 
@@ -7882,7 +7881,7 @@ ix86_expand_strlensi_unroll_1 (rtx out, rtx src, rtx align_rtx)
   emit_insn (gen_addqi3_cconly_overflow (tmpreg, tmpreg));
   tmp = gen_rtx_REG (CCmode, FLAGS_REG);
   cmp = gen_rtx_LTU (VOIDmode, tmp, const0_rtx);
-  emit_insn (ix86_gen_sub3_carry (out, out, GEN_INT (3), tmp, cmp));
+  emit_insn (gen_sub3_carry (Pmode, out, out, GEN_INT (3), tmp, cmp));
 
   emit_label (end_0_label);
 }
@@ -7915,7 +7914,7 @@ if (TARGET_UNROLL_STRLEN
       /* strlensi_unroll_1 returns the address of the zero at the end of
 	 the string, like memchr(), so compute the length by subtracting
 	 the start address.  */
-      emit_insn (ix86_gen_sub3 (out, out, addr));
+      emit_insn (gen_sub2_insn (out, addr));
       return true;
     }
   else
@@ -7938,7 +7937,7 @@ construct_plt_address (rtx symbol)
   unspec = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, symbol), UNSPEC_PLTOFF);
 
   emit_move_insn (tmp, gen_rtx_CONST (Pmode, unspec));
-  emit_insn (ix86_gen_add3 (tmp, tmp, pic_offset_table_rtx));
+  emit_insn (gen_add2_insn (tmp, pic_offset_table_rtx));
   return tmp;
 }
 
diff --git a/gcc/config/i386/i386-options.c b/gcc/config/i386/i386-options.c
index 5f14bb54ca21..cd33d227d9bf 100644
--- a/gcc/config/i386/i386-options.c
+++ b/gcc/config/i386/i386-options.c
@@ -2552,21 +2552,6 @@ ix86_option_override_internal (bool main_args_p,
   if (!TARGET_64BIT_P (opts->x_ix86_isa_flags) && !opts->x_flag_split_stack)
     targetm.expand_builtin_va_start = NULL;
 
-  if (Pmode == DImode)
-    {
-      ix86_gen_add3 = gen_adddi3;
-      ix86_gen_sub3 = gen_subdi3;
-      ix86_gen_sub3_carry = gen_subdi3_carry;
-      ix86_gen_andsp = gen_anddi3;
-    }
-  else
-    {
-      ix86_gen_add3 = gen_addsi3;
-      ix86_gen_sub3 = gen_subsi3;
-      ix86_gen_sub3_carry = gen_subsi3_carry;
-      ix86_gen_andsp = gen_andsi3;
-    }
-
 #ifdef USE_IX86_CLD
   /* Use -mcld by default for 32-bit code if configured with --enable-cld.  */
   if (!TARGET_64BIT_P (opts->x_ix86_isa_flags))
diff --git a/gcc/config/i386/i386-options.h b/gcc/config/i386/i386-options.h
index 5021ac5e7d7e..966eb766ad93 100644
--- a/gcc/config/i386/i386-options.h
+++ b/gcc/config/i386/i386-options.h
@@ -55,11 +55,6 @@ extern tree (*ix86_veclib_handler) (combined_fn, tree, tree);
 extern tree ix86_veclibabi_svml (combined_fn, tree, tree);
 extern tree ix86_veclibabi_acml (combined_fn, tree, tree);
 
-extern rtx (*ix86_gen_add3) (rtx, rtx, rtx);
-extern rtx (*ix86_gen_sub3) (rtx, rtx, rtx);
-extern rtx (*ix86_gen_sub3_carry) (rtx, rtx, rtx, rtx, rtx);
-extern rtx (*ix86_gen_andsp) (rtx, rtx, rtx);
-
 enum ix86_function_specific_strings
 {
   IX86_FUNCTION_SPECIFIC_ARCH,
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 75ad1058e4cb..72e59417fdf2 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -349,11 +349,6 @@ enum processor_type ix86_arch;
 /* True if processor has SSE prefetch instruction.  */
 unsigned char x86_prefetch_sse;
 
-rtx (*ix86_gen_add3) (rtx, rtx, rtx);
-rtx (*ix86_gen_sub3) (rtx, rtx, rtx);
-rtx (*ix86_gen_sub3_carry) (rtx, rtx, rtx, rtx, rtx);
-rtx (*ix86_gen_andsp) (rtx, rtx, rtx);
-
 /* Preferred alignment for stack boundary in bits.  */
 unsigned int ix86_preferred_stack_boundary;
 
@@ -1647,8 +1642,7 @@ ix86_init_large_pic_reg (unsigned int tmp_regno)
   emit_insn (gen_set_rip_rex64 (pic_offset_table_rtx,
 				label));
   emit_insn (gen_set_got_offset_rex64 (tmp_reg, label));
-  emit_insn (ix86_gen_add3 (pic_offset_table_rtx,
-			    pic_offset_table_rtx, tmp_reg));
+  emit_insn (gen_add2_insn (pic_offset_table_rtx, tmp_reg));
   const char *name = LABEL_NAME (label);
   PUT_CODE (label, NOTE);
   NOTE_KIND (label) = NOTE_INSN_DELETED_LABEL;
@@ -7746,6 +7740,20 @@ ix86_emit_outlined_ms2sysv_save (const struct ix86_frame &frame)
   RTX_FRAME_RELATED_P (insn) = true;
 }
 
+/* Generate and return an insn body to AND X with Y.  */
+
+static rtx_insn *
+gen_and2_insn (rtx x, rtx y)
+{
+  enum insn_code icode = optab_handler (and_optab, GET_MODE (x));
+
+  gcc_assert (insn_operand_matches (icode, 0, x));
+  gcc_assert (insn_operand_matches (icode, 1, x));
+  gcc_assert (insn_operand_matches (icode, 2, y));
+
+  return GEN_FCN (icode) (x, x, y);
+}
+
 /* Expand the prologue into a bunch of separate insns.  */
 
 void
@@ -7901,9 +7909,8 @@ ix86_expand_prologue (void)
       m->fs.cfa_offset = 0;
 
       /* Align the stack.  */
-      insn = emit_insn (ix86_gen_andsp (stack_pointer_rtx,
-					stack_pointer_rtx,
-					GEN_INT (-align_bytes)));
+      insn = emit_insn (gen_and2_insn (stack_pointer_rtx,
+				       GEN_INT (-align_bytes)));
       RTX_FRAME_RELATED_P (insn) = 1;
 
       /* Replicate the return address on the stack so that return
@@ -8007,9 +8014,8 @@ ix86_expand_prologue (void)
 				   GEN_INT (-allocate), -1, false);
 
       /* Align the stack.  */
-      insn = emit_insn (ix86_gen_andsp (stack_pointer_rtx,
-					stack_pointer_rtx,
-					GEN_INT (-align_bytes)));
+      insn = emit_insn (gen_and2_insn (stack_pointer_rtx,
+				       GEN_INT (-align_bytes)));
       m->fs.sp_offset = ROUND_UP (m->fs.sp_offset, align_bytes);
       m->fs.sp_realigned_offset = m->fs.sp_offset
 					      - frame.stack_realign_allocate;
@@ -8258,7 +8264,7 @@ ix86_expand_prologue (void)
   /* If we havn't already set up the frame pointer, do so now.  */
   if (frame_pointer_needed && !m->fs.fp_valid)
     {
-      insn = ix86_gen_add3 (hard_frame_pointer_rtx, stack_pointer_rtx,
+      insn = gen_add3_insn (hard_frame_pointer_rtx, stack_pointer_rtx,
 			    GEN_INT (frame.stack_pointer_offset
 				     - frame.hard_frame_pointer_offset));
       insn = emit_insn (insn);
@@ -9291,7 +9297,7 @@ ix86_expand_split_stack_prologue (void)
       scratch_reg = gen_rtx_REG (Pmode, scratch_regno);
       if (!TARGET_64BIT || x86_64_immediate_operand (offset, Pmode))
 	{
-	  /* We don't use ix86_gen_add3 in this case because it will
+	  /* We don't use gen_add in this case because it will
 	     want to split to lea, but when not optimizing the insn
 	     will not be split after this point.  */
 	  emit_insn (gen_rtx_SET (scratch_reg,
@@ -9301,8 +9307,7 @@ ix86_expand_split_stack_prologue (void)
       else
 	{
 	  emit_move_insn (scratch_reg, offset);
-	  emit_insn (ix86_gen_add3 (scratch_reg, scratch_reg,
-				    stack_pointer_rtx));
+	  emit_insn (gen_add2_insn (scratch_reg, stack_pointer_rtx));
 	}
       current = scratch_reg;
     }
@@ -9379,7 +9384,7 @@ ix86_expand_split_stack_prologue (void)
 	      LABEL_PRESERVE_P (label) = 1;
 	      emit_insn (gen_set_rip_rex64 (reg10, label));
 	      emit_insn (gen_set_got_offset_rex64 (reg11, label));
-	      emit_insn (ix86_gen_add3 (reg10, reg10, reg11));
+	      emit_insn (gen_add2_insn (reg10, reg11));
 	      x = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, split_stack_fn_large),
 				  UNSPEC_GOT);
 	      x = gen_rtx_CONST (Pmode, x);
@@ -10954,7 +10959,7 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov)
 	{
 	  base = get_thread_pointer (Pmode, true);
 	  dest = gen_reg_rtx (Pmode);
-	  emit_insn (ix86_gen_sub3 (dest, base, off));
+	  emit_insn (gen_sub3_insn (dest, base, off));
 	}
       break;
 
@@ -10974,7 +10979,7 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov)
 	{
 	  base = get_thread_pointer (Pmode, true);
 	  dest = gen_reg_rtx (Pmode);
-	  emit_insn (ix86_gen_sub3 (dest, base, off));
+	  emit_insn (gen_sub3_insn (dest, base, off));
 	}
       break;
 
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index b7328e040d3f..dae80ccb5592 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -6633,7 +6633,7 @@
 	   (plus:SWI48 (match_dup 1) (match_dup 2)))])]
   "ix86_binary_operator_ok (PLUS, <MODE>mode, operands)")
 
-(define_insn "sub<mode>3_carry"
+(define_insn "@sub<mode>3_carry"
   [(set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m,<r>")
 	(minus:SWI
 	  (minus:SWI
