[RFC,i386] : Allow SUBREG_PROMOTED_UNSIGNED_P subregs in address

Hello!

Attached RFC patch buids on recent x86 improvements in
ix86_legitimate_address_p/ix86_decompose_address functions. With this
patch, we allow SUBREGs with register_no_elim_operand registers in
base, index and PLUS chains. As the consequence, we can relax the
condition that rejects SUBREGs, wider than word mode due to possible
spill failures with double-word SUBREGs. register_no_elim_operand
together with REG_OK_FOR_BASE/REG_OK_FOR_INDEX predicates guarantee,
that there will be no spills since multi-word registers that satisfy
these predicates can easily be decomposed to satisfy SUBREGs.

Another improvement is introduction of SUBREG_PROMOTED_UNSIGNED_P
predicate in the same area to handle paradoxical SUBREGs. When SUBREG
satisfies this predicate, the compiler guarantees, that excess bits
are zero (see the documentation). This is exaclty what we want in
registers that form the address. In theory, we can allow registers of
any integer mode here, but in practice only DImode subreg of SImode
register is important.

IMO, the first optimization is important on i686, while the second is
important on x32 (lots of paradoxical subregs in addresses due to
Pmode != ptr_mode), but they are also nice to have on x86_64.

Any thoughts?

2011-07-20  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/i386.c (ix86_decompose_address): Also allow promoted
	paradoxical subregs in base and PLUS chains.  Allow only paradoxical
	subregs and subregs of DImode hard registers in subregs of index.
	(ix86_legitimate_address_p): Allow subregs of base and index to span
	more than a word.  Assert that subregs of base and index satisfy
	SUBREG_PROMOTED_UNSIGNED_P or register_no_elim_operand predicates.

Patch was bootstrapped and is currently regression testing on
x86_64-pc-linux-gnu {,-m32}.

Uros.

On 07/20/2011 09:41 AM, Uros Bizjak wrote:
> 	* config/i386/i386.c (ix86_decompose_address): Also allow promoted
> 	paradoxical subregs in base and PLUS chains.  Allow only paradoxical
> 	subregs and subregs of DImode hard registers in subregs of index.
> 	(ix86_legitimate_address_p): Allow subregs of base and index to span
> 	more than a word.  Assert that subregs of base and index satisfy
> 	SUBREG_PROMOTED_UNSIGNED_P or register_no_elim_operand predicates.

The patch looks good.

It seems like one other check is required: that the mode of base and
index are the same.  We've been accepting either SImode or DImode.
As long as they're both the same we get either

	mov	(%rax, %rdx, 4), %ebx
	mov	(%eax, %edx, 4), %ebx

which are both valid insns (without and with addr32 prefix).  Whereas

	mov	(%rax, %edx, 4), %ebx

will correctly be rejected by the assembler.


r~

> Another improvement is introduction of SUBREG_PROMOTED_UNSIGNED_P
> predicate in the same area to handle paradoxical SUBREGs. When SUBREG
> satisfies this predicate, the compiler guarantees, that excess bits
> are zero (see the documentation). This is exaclty what we want in
> registers that form the address. In theory, we can allow registers of
> any integer mode here, but in practice only DImode subreg of SImode
> register is important.

Note that SUBREG_PROMOTED_UNSIGNED_P wasn't designed for paradoxical subregs, 
but for regular subregs (typically of word-sized objects).  You should check 
that the ones created for x32 (because of POINTERS_EXTEND_UNSIGNED I guess) 
are legitimate.

On Wed, Jul 20, 2011 at 8:04 PM, Eric Botcazou <ebotcazou@adacore.com> wrote:
>> Another improvement is introduction of SUBREG_PROMOTED_UNSIGNED_P
>> predicate in the same area to handle paradoxical SUBREGs. When SUBREG
>> satisfies this predicate, the compiler guarantees, that excess bits
>> are zero (see the documentation). This is exaclty what we want in
>> registers that form the address. In theory, we can allow registers of
>> any integer mode here, but in practice only DImode subreg of SImode
>> register is important.
>
> Note that SUBREG_PROMOTED_UNSIGNED_P wasn't designed for paradoxical subregs,
> but for regular subregs (typically of word-sized objects).  You should check
> that the ones created for x32 (because of POINTERS_EXTEND_UNSIGNED I guess)
> are legitimate.

Hm, the documentation says:

    Paradoxical subregs
          When M1 is strictly wider than M2, the `subreg' expression is
          called "paradoxical".  The canonical test for this class of
          `subreg' is:

               GET_MODE_SIZE (M1) > GET_MODE_SIZE (M2)

          Paradoxical `subreg's can be used as both lvalues and rvalues.
          When used as an lvalue, the low-order bits of the source value
          are stored in REG and the high-order bits are discarded.
          When used as an rvalue, the low-order bits of the `subreg' are
          taken from REG while the high-order bits may or may not be
          defined.

          The high-order bits of rvalues are in the following
          circumstances:

             * `subreg's of `mem' When M2 is smaller than a word, the
               macro `LOAD_EXTEND_OP', can control how the high-order
               bits are defined.

             * `subreg' of `reg's The upper bits are defined when
               `SUBREG_PROMOTED_VAR_P' is true.
               `SUBREG_PROMOTED_UNSIGNED_P' describes what the upper
               bits hold.  Such subregs usually represent local
               variables, register variables and parameter pseudo
               variables that have been promoted to a wider mode.

I have looked at example in rs6000.c, the only target that uses
SUBREG_PROMOTED_UNSIGNED_P. Looking at other sources, S_P_U_P is used
in conjunction with SUBREG_PROMOTED_VAR. It looks to me that using the
combination should be OK to determine if subreg is correct.

Uros.