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[committed] i386: Add V2SFmode sqrt insn pattern [PR95046]

Message ID CAFULd4bDNxkvwSJnH7cUDHRh5FGKLCxMdK9v21gHOu9EQjoO7Q@mail.gmail.com
State New
Headers show
Series [committed] i386: Add V2SFmode sqrt insn pattern [PR95046] | expand

Commit Message

Uros Bizjak May 11, 2020, 6:14 p.m. UTC 
gcc/ChangeLog:

2020-05-11  Uroš Bizjak  <ubizjak@gmail.com>

    PR target/95046
    * config/i386/mmx.md (sqrtv2sf2): New insn pattern.

testsuite/ChangeLog:

2020-05-11  Uroš Bizjak  <ubizjak@gmail.com>

    PR target/95046
    * gcc.target/i386/pr95046-1.c (test_sqrt): Add.

Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.

Uros.
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Patch

diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md
index 7d76c631a77..a8f603b94f8 100644
--- a/gcc/config/i386/mmx.md
+++ b/gcc/config/i386/mmx.md
@@ -461,6 +461,20 @@ 
    (set_attr "prefix_extra" "1")
    (set_attr "mode" "V2SF")])
 
+(define_insn "sqrtv2sf2"
+  [(set (match_operand:V2SF 0 "register_operand" "=x,v")
+	(sqrt:V2SF (match_operand:V2SF 1 "register_operand" "0,v")))]
+  "TARGET_MMX_WITH_SSE"
+  "@
+   sqrtps\t{%1, %0|%0, %1}
+   vsqrtps\t{%1, %0|%0, %1}"
+  [(set_attr "isa" "noavx,avx")
+   (set_attr "type" "sse")
+   (set_attr "atom_sse_attr" "sqrt")
+   (set_attr "btver2_sse_attr" "sqrt")
+   (set_attr "prefix" "orig,vex")
+   (set_attr "mode" "V4SF")])
+
 (define_insn "mmx_rsqrtv2sf2"
   [(set (match_operand:V2SF 0 "register_operand" "=y")
 	(unspec:V2SF [(match_operand:V2SF 1 "nonimmediate_operand" "ym")]
diff --git a/gcc/testsuite/gcc.target/i386/pr95046-1.c b/gcc/testsuite/gcc.target/i386/pr95046-1.c
index f93d9e1a507..7adc2069c53 100644
--- a/gcc/testsuite/gcc.target/i386/pr95046-1.c
+++ b/gcc/testsuite/gcc.target/i386/pr95046-1.c
@@ -49,3 +49,14 @@  test_max (void)
 }
 
 /* { dg-final { scan-assembler "maxps" } } */
+
+float sqrtf (float);
+
+void
+test_sqrt (void)
+{
+  for (int i = 0; i < 2; i++)
+    r[i] = sqrtf (a[i]);
+}
+
+/* { dg-final { scan-assembler "sqrtps" } } */