diff mbox series

[committed] i386: Fix strict_low_part QImode insn with high input register patterns [PR112540]

Message ID CAFULd4b2=SzZSxX1w7vpELi9XcLmjt5CRLcLjHfhH44KTnEBcA@mail.gmail.com
State New
Headers show
Series [committed] i386: Fix strict_low_part QImode insn with high input register patterns [PR112540] | expand

Commit Message

Uros Bizjak Nov. 15, 2023, 3:13 p.m. UTC 
PR target/112540

gcc/ChangeLog:

    * config/i386/i386.md (*addqi_ext<mode>_1_slp):
    Correct operand numbers in split pattern.  Replace !Q constraint
    of operand 1 with !qm.  Add insn constrain.
    (*subqi_ext<mode>_1_slp): Ditto.
    (*<any_logic:code>qi_ext<mode>_1_slp): Ditto.

Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.

Uros.
diff mbox series

Patch

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 6136e46b1bc..29ec9425200 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -6624,9 +6624,9 @@  (define_insn_and_split "*addqi_ext<mode>_1_slp"
 	      [(match_operand 2 "int248_register_operand" "Q,Q")
 	       (const_int 8)
 	       (const_int 8)]) 0)
-	  (match_operand:QI 1 "nonimmediate_operand" "0,!Q")))
+	  (match_operand:QI 1 "nonimmediate_operand" "0,!qm")))
    (clobber (reg:CC FLAGS_REG))]
-  ""
+  "!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun)"
   "@
    add{b}\t{%h2, %0|%0, %h2}
    #"
@@ -6638,8 +6638,8 @@  (define_insn_and_split "*addqi_ext<mode>_1_slp"
 	   (plus:QI
 	     (subreg:QI
 	       (match_op_dup 3
-		 [(match_dup 0) (const_int 8) (const_int 8)]) 0)
-	   (match_dup 1)))
+		 [(match_dup 2) (const_int 8) (const_int 8)]) 0)
+	   (match_dup 0)))
       (clobber (reg:CC FLAGS_REG))])]
   ""
   [(set_attr "type" "alu")
@@ -7662,14 +7662,14 @@  (define_insn_and_split "*sub<mode>_1_slp"
 (define_insn_and_split "*subqi_ext<mode>_1_slp"
   [(set (strict_low_part (match_operand:QI 0 "register_operand" "+Q,&Q"))
 	(minus:QI
-	  (match_operand:QI 1 "nonimmediate_operand" "0,!Q")
+	  (match_operand:QI 1 "nonimmediate_operand" "0,!qm")
 	  (subreg:QI
 	    (match_operator:SWI248 3 "extract_operator"
 	      [(match_operand 2 "int248_register_operand" "Q,Q")
 	       (const_int 8)
 	       (const_int 8)]) 0)))
    (clobber (reg:CC FLAGS_REG))]
-  ""
+  "!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun)"
   "@
    sub{b}\t{%h2, %0|%0, %h2}
    #"
@@ -7679,10 +7679,10 @@  (define_insn_and_split "*subqi_ext<mode>_1_slp"
    (parallel
      [(set (strict_low_part (match_dup 0))
 	   (minus:QI
-	   (match_dup 1)
+	     (match_dup 0)
 	     (subreg:QI
 	       (match_op_dup 3
-		 [(match_dup 0) (const_int 8) (const_int 8)]) 0)))
+		 [(match_dup 2) (const_int 8) (const_int 8)]) 0)))
       (clobber (reg:CC FLAGS_REG))])]
   ""
   [(set_attr "type" "alu")
@@ -11492,9 +11492,9 @@  (define_insn_and_split "*<code>qi_ext<mode>_1_slp"
 	      [(match_operand 2 "int248_register_operand" "Q,Q")
 	       (const_int 8)
 	       (const_int 8)]) 0)
-	  (match_operand:QI 1 "nonimmediate_operand" "0,!Q")))
+	  (match_operand:QI 1 "nonimmediate_operand" "0,!qm")))
    (clobber (reg:CC FLAGS_REG))]
-  ""
+  "!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun)"
   "@
    <logic>{b}\t{%h2, %0|%0, %h2}
    #"
@@ -11504,10 +11504,10 @@  (define_insn_and_split "*<code>qi_ext<mode>_1_slp"
    (parallel
      [(set (strict_low_part (match_dup 0))
 	   (any_logic:QI
-	   (match_dup 1)
 	     (subreg:QI
 	       (match_op_dup 3
-		 [(match_dup 0) (const_int 8) (const_int 8)]) 0)))
+		 [(match_dup 2) (const_int 8) (const_int 8)]) 0)))
+	   (match_dup 0)
       (clobber (reg:CC FLAGS_REG))])]
   ""
   [(set_attr "type" "alu")