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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703170990; x=1703775790; h=to:subject:message-id:date:from:mime-version:x-gm-message-state :from:to:cc:subject:date:message-id:reply-to; bh=3Ylo4nhBlbDJ3+gCJbzOFqkPq8a8iwMq7E8rcxTZ5wc=; b=C2PVgENaqH8wEq68GM4kXIl2TEWZV4NS9CY8ZAKId2mwWZHhcLk95AoExlaZGWlXI7 pJ2fCLkAbN0B2Wpftj7ePNQNDTbcR+MNRyaRcmQh66jQ+ddbZLlH5YSipAXThlrwZx1d vJF5vnfRZrLZrLmqe7K/1u5Vdf9x3t5VJTbs645a6CBFGMcLBd5whwu6HS1l0TDlYLQv z10tyk446lhazcelH1+zrLc2I7XwLCPKDbnkgHaUBe0+jq9va6/+ZEmbJIxTw8ZBviOu iRUSmR1wX2Jhdiq0v1aXvhoC5edJKp8ZALzaO7qusj5Nj++UJ+Llgx+SduSPqilaIpVi NfWw== X-Gm-Message-State: AOJu0Yxe5isE+Wn7k5QU96Dn1N85+1h2z0pvr6FfNmSS5WzaRCiHLEQx ZcNoa9E4CO9EV0KNDCRDygknMaJEC8uSBVomyYywf7Lu+KEpRA== X-Google-Smtp-Source: AGHT+IGrTgmo1tyLP3vJWyX8E78AY+S7y2DT1Qy21lbcUNiP7ilaEyPe9UhB492QlwDnHXp2896itirGWhK8R1nfteg= X-Received: by 2002:a2e:9ec4:0:b0:2ca:752:24a3 with SMTP id h4-20020a2e9ec4000000b002ca075224a3mr10892666ljk.22.1703170990045; Thu, 21 Dec 2023 07:03:10 -0800 (PST) MIME-Version: 1.0 From: Uros Bizjak Date: Thu, 21 Dec 2023 16:02:58 +0100 Message-ID: Subject: [committed] i386: Fix shifts with high register input operand [PR113044] To: "gcc-patches@gcc.gnu.org" X-Spam-Status: No, score=-8.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org The move to the output operand should use high register input operand. PR target/113044 gcc/ChangeLog: * config/i386/i386.md (*ashlqi_ext_1): Move from the high register of the input operand. (*qi_ext_1): Ditto. gcc/testsuite/ChangeLog: * gcc.target/i386/pr113044.c: New test. Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}. Uros, diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 710068e9093..4c6368bf3b7 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -15527,7 +15527,8 @@ (define_insn_and_split "*ashlqi_ext_1" && !(rtx_equal_p (operands[0], operands[1]))" [(set (zero_extract:SWI248 (match_dup 0) (const_int 8) (const_int 8)) - (match_dup 1)) + (zero_extract:SWI248 + (match_dup 1) (const_int 8) (const_int 8))) (parallel [(set (zero_extract:SWI248 (match_dup 0) (const_int 8) (const_int 8)) @@ -16689,7 +16690,8 @@ (define_insn_and_split "*qi_ext_1" && !(rtx_equal_p (operands[0], operands[1]))" [(set (zero_extract:SWI248 (match_dup 0) (const_int 8) (const_int 8)) - (match_dup 1)) + (zero_extract:SWI248 + (match_dup 1) (const_int 8) (const_int 8))) (parallel [(set (zero_extract:SWI248 (match_dup 0) (const_int 8) (const_int 8)) diff --git a/gcc/testsuite/gcc.target/i386/pr113044.c b/gcc/testsuite/gcc.target/i386/pr113044.c new file mode 100644 index 00000000000..923e7f48299 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr113044.c @@ -0,0 +1,24 @@ +/* PR target/113044 */ +/* { dg-do run } */ +/* { dg-options "-O" } */ + +typedef unsigned char __attribute__((__vector_size__ (2))) V; + +V +foo (char c, V v) +{ + V x = v >> (v & 8); + volatile char d = c; + if (!d) + __builtin_abort(); + return x; +} + +int +main (void) +{ + V x = foo (10, (V){3}); + if (x[0] != 3 || x[1]) + __builtin_abort(); + return 0; +}