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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699809686; x=1700414486; h=to:subject:message-id:date:from:mime-version:x-gm-message-state :from:to:cc:subject:date:message-id:reply-to; bh=woARWcRBmxZKUSYdLjpyT/6M1bH/tfQwSsmoXdfGaUc=; b=AGRprYRRRTxb1h7kQHa7bFaooavUxAO1Mc+GK7WGbEuHZ6dd1IkuBmVXKfKTJls6nD fHU942O3sm9VUcRM63m14ZcO51FwnSC90r/J2dP3BJ7kU52WRlmZFwZckGfulV9t+t31 dvDwa3EA/npYp5Etvnw7zFfAcZd/6PtTi1VRUk39UrJbGFFWRB53Z+3kN9++yPsSCWH7 u/Yv0lXmdPuuSv8eC+CgqkCv8Nf3Bv6YxKvJD5AVCxEj9wCVBfBRPY+vSJssQDe/3EBo rR+HPu9owzjRiM3f/KJJQhS/UH9MzigXT0dgcclM21vB2qeCZqkdyydvvnrhGpxsM+OG KINg== X-Gm-Message-State: AOJu0Ywh0VHvsHdKirxs7d0qWDn/IjuQebM2ZrPs9ivrUtW28qgdpksv gkfPlTBhkNNtmd1hWH+jPa7N+krRGceBX19mJ7RSjzuwr/Q/Ag== X-Google-Smtp-Source: AGHT+IGjVZHQlL3uVHxEfBk5ZFn5N3pJdKmBuIILt66vYD07Z6T0KOtkeBXy0RQZsIycrc8F3oBjwWJzalJ9d3bY4gU= X-Received: by 2002:aa7:d904:0:b0:53e:468d:64a9 with SMTP id a4-20020aa7d904000000b0053e468d64a9mr3269210edr.21.1699809686126; Sun, 12 Nov 2023 09:21:26 -0800 (PST) MIME-Version: 1.0 From: Uros Bizjak Date: Sun, 12 Nov 2023 18:21:14 +0100 Message-ID: Subject: [committed] i386: Remove *stack_protect_set_4s__di alternative that will never match To: "gcc-patches@gcc.gnu.org" X-Spam-Status: No, score=-8.3 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org The relevant peephole2 will never generate alternative (=m,=&a,0,m) because operand 1 is not dead before the peephole2 pattern. gcc/ChangeLog: * config/i386/i386.md (*stack_protect_set_4s__di): Remove alternative 0. Bootstrapped and regression tested on x86_64-pc-linux-gnu {,-m32}. Uros. diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 01fc6ecc351..ffd9f2d0381 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -24481,19 +24481,16 @@ (define_insn "*stack_protect_set_4z__di" (set_attr "length" "24")]) (define_insn "*stack_protect_set_4s__di" - [(set (match_operand:PTR 0 "memory_operand" "=m,m") - (unspec:PTR [(match_operand:PTR 3 "memory_operand" "m,m")] + [(set (match_operand:PTR 0 "memory_operand" "=m") + (unspec:PTR [(match_operand:PTR 3 "memory_operand" "m")] UNSPEC_SP_SET)) - (set (match_operand:DI 1 "register_operand" "=&a,&r") - (sign_extend:DI (match_operand:SI 2 "nonimmediate_operand" "0,rm")))] + (set (match_operand:DI 1 "register_operand" "=&r") + (sign_extend:DI (match_operand:SI 2 "nonimmediate_operand" "rm")))] "TARGET_64BIT && reload_completed" { output_asm_insn ("mov{}\t{%3, %1|%1, %3}", operands); output_asm_insn ("mov{}\t{%1, %0|%0, %1}", operands); - if (which_alternative) - return "movs{lq|x}\t{%2, %1|%1, %2}"; - else - return "{cltq|cdqe}"; + return "movs{lq|x}\t{%2, %1|%1, %2}"; } [(set_attr "type" "multi") (set_attr "length" "24")])