From patchwork Thu Nov 26 14:21:18 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Uros Bizjak X-Patchwork-Id: 1406709 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gcc.gnu.org Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=YpgXerCC; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4Chg1F0jlJz9sVV for ; Fri, 27 Nov 2020 01:21:37 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id E67473892007; Thu, 26 Nov 2020 14:21:33 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org E67473892007 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1606400494; bh=5SgLINGO1O3DvAfgsI6Nbb/o/mOcohmdY1Y9Ej8HkOs=; h=Date:Subject:To:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=YpgXerCCviLu6fx0lO6GE8UKwkuZdK6o005V3kabr//VFWl7l9IMHBwcbIz/4DhZz gCRVpZiTvBiUSwkuZ3FK7ByGeNM6ga/pEotoLDDYERdMnRMBPGfxDCK0rSGZWLgMwG veoO/2yfxp4I2iDLj+F162E84zNYFtTF/+EFtaXc= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-qk1-x730.google.com (mail-qk1-x730.google.com [IPv6:2607:f8b0:4864:20::730]) by sourceware.org (Postfix) with ESMTPS id 338163857C5E for ; Thu, 26 Nov 2020 14:21:30 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 338163857C5E Received: by mail-qk1-x730.google.com with SMTP id 1so312584qka.0 for ; Thu, 26 Nov 2020 06:21:30 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:from:date:message-id:subject:to; bh=5SgLINGO1O3DvAfgsI6Nbb/o/mOcohmdY1Y9Ej8HkOs=; b=Uczl1Te6QcL2D+CQlVrChIdBmM4AnNfmDXtLxJQBXL4PKYpyWF6A9QZ/4hq+RCwb5N 76ojhTvkKoDNDs0MY9u5Y18617SZIuYoZV6sq2G8W4Sj/MrwW4WJ1Bk0apueTAEab/+7 q47PqxXfKNJQnbxQNMcIaa9t4gV67F9yjmtKBVTMls50Sqf92K4z0kD/7Us62bqhLDTU Lj1y/C/KtZ/YFM++WtE6svR9uZkttQAGmwFTa9UwHnlbMb4OVfMN1xDHIPa7MiHW38HG lgcHP659g1BwPjQpZGRDrIfYXNy5dtMiAaCHEsioud2ZXc/cDr53L2w0uA0zC793U3Yp Q+hQ== X-Gm-Message-State: AOAM533KgXt22GpsReZW6/8cHH/j7GWvUpwCg6isdDqLQwT5QA+2kf5Z haAPLcpVy1WTOIA/agSBJHTA9dsQUjkIwRlp9zn/NHekfvTpRg== X-Google-Smtp-Source: ABdhPJzNgD0NHKPqWQqKLS+2dCD7wXBF/iChEDNXZuTo/D0vcKMenaPTJx8/lQflvEXPMlLN8U0JqAxc0GOnxl8G+5E= X-Received: by 2002:a05:620a:1655:: with SMTP id c21mr3403962qko.127.1606400489585; Thu, 26 Nov 2020 06:21:29 -0800 (PST) MIME-Version: 1.0 Date: Thu, 26 Nov 2020 15:21:18 +0100 Message-ID: Subject: i386: Cleanup argument handling in ix86_expand_*_builtin functions. To: "gcc-patches@gcc.gnu.org" X-Spam-Status: No, score=-9.6 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Uros Bizjak via Gcc-patches From: Uros Bizjak Reply-To: Uros Bizjak Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" There is no need for struct with rtx and mode members since mode is never used. 2020-11-26 Uroš Bizjak gcc/ * config/i386/i386-expand.c (ix86_expand_multi_arg_builtin): Remove args array of structs, declare rtx xops array instead. Update all uses. (ix86_expand_args_builtin): Ditto. (ix86_expand_round_builtin): Ditto. (ix86_expand_special_args_builtin): Ditto. Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}. Pushed to mainline. Uros. diff --git a/gcc/config/i386/i386-expand.c b/gcc/config/i386/i386-expand.c index 73e3358b290..b260ce015c4 100644 --- a/gcc/config/i386/i386-expand.c +++ b/gcc/config/i386/i386-expand.c @@ -8299,16 +8299,12 @@ ix86_expand_multi_arg_builtin (enum insn_code icode, tree exp, rtx target, enum rtx_code sub_code) { rtx pat; - int i; - int nargs; + unsigned int i, nargs; bool comparison_p = false; bool tf_p = false; bool last_arg_constant = false; int num_memory = 0; - struct { - rtx op; - machine_mode mode; - } args[4]; + rtx xops[4]; machine_mode tmode = insn_data[icode].operand[0].mode; @@ -8402,7 +8398,7 @@ ix86_expand_multi_arg_builtin (enum insn_code icode, tree exp, rtx target, else if (memory_operand (target, tmode)) num_memory++; - gcc_assert (nargs <= 4); + gcc_assert (nargs <= ARRAY_SIZE (xops)); for (i = 0; i < nargs; i++) { @@ -8482,38 +8478,36 @@ ix86_expand_multi_arg_builtin (enum insn_code icode, tree exp, rtx target, op = force_reg (mode, op); } - args[i].op = op; - args[i].mode = mode; + xops[i] = op; } switch (nargs) { case 1: - pat = GEN_FCN (icode) (target, args[0].op); + pat = GEN_FCN (icode) (target, xops[0]); break; case 2: if (tf_p) - pat = GEN_FCN (icode) (target, args[0].op, args[1].op, + pat = GEN_FCN (icode) (target, xops[0], xops[1], GEN_INT ((int)sub_code)); else if (! comparison_p) - pat = GEN_FCN (icode) (target, args[0].op, args[1].op); + pat = GEN_FCN (icode) (target, xops[0], xops[1]); else { rtx cmp_op = gen_rtx_fmt_ee (sub_code, GET_MODE (target), - args[0].op, - args[1].op); + xops[0], xops[1]); - pat = GEN_FCN (icode) (target, cmp_op, args[0].op, args[1].op); + pat = GEN_FCN (icode) (target, cmp_op, xops[0], xops[1]); } break; case 3: - pat = GEN_FCN (icode) (target, args[0].op, args[1].op, args[2].op); + pat = GEN_FCN (icode) (target, xops[0], xops[1], xops[2]); break; case 4: - pat = GEN_FCN (icode) (target, args[0].op, args[1].op, args[2].op, args[3].op); + pat = GEN_FCN (icode) (target, xops[0], xops[1], xops[2], xops[3]); break; default: @@ -8993,11 +8987,7 @@ ix86_expand_args_builtin (const struct builtin_description *d, unsigned int nargs_constant = 0; unsigned int mask_pos = 0; int num_memory = 0; - struct - { - rtx op; - machine_mode mode; - } args[6]; + rtx xops[6]; bool second_arg_count = false; enum insn_code icode = d->icode; const struct insn_data_d *insn_p = &insn_data[icode]; @@ -9757,7 +9747,7 @@ ix86_expand_args_builtin (const struct builtin_description *d, gcc_unreachable (); } - gcc_assert (nargs <= ARRAY_SIZE (args)); + gcc_assert (nargs <= ARRAY_SIZE (xops)); if (comparison != UNKNOWN) { @@ -9964,34 +9954,31 @@ ix86_expand_args_builtin (const struct builtin_description *d, } } - args[i].op = op; - args[i].mode = mode; + xops[i] = op; } switch (nargs) { case 1: - pat = GEN_FCN (icode) (real_target, args[0].op); + pat = GEN_FCN (icode) (real_target, xops[0]); break; case 2: - pat = GEN_FCN (icode) (real_target, args[0].op, args[1].op); + pat = GEN_FCN (icode) (real_target, xops[0], xops[1]); break; case 3: - pat = GEN_FCN (icode) (real_target, args[0].op, args[1].op, - args[2].op); + pat = GEN_FCN (icode) (real_target, xops[0], xops[1], xops[2]); break; case 4: - pat = GEN_FCN (icode) (real_target, args[0].op, args[1].op, - args[2].op, args[3].op); + pat = GEN_FCN (icode) (real_target, xops[0], xops[1], + xops[2], xops[3]); break; case 5: - pat = GEN_FCN (icode) (real_target, args[0].op, args[1].op, - args[2].op, args[3].op, args[4].op); + pat = GEN_FCN (icode) (real_target, xops[0], xops[1], + xops[2], xops[3], xops[4]); break; case 6: - pat = GEN_FCN (icode) (real_target, args[0].op, args[1].op, - args[2].op, args[3].op, args[4].op, - args[5].op); + pat = GEN_FCN (icode) (real_target, xops[0], xops[1], + xops[2], xops[3], xops[4], xops[5]); break; default: gcc_unreachable (); @@ -10258,11 +10245,7 @@ ix86_expand_round_builtin (const struct builtin_description *d, { rtx pat; unsigned int i, nargs; - struct - { - rtx op; - machine_mode mode; - } args[6]; + rtx xops[6]; enum insn_code icode = d->icode; const struct insn_data_d *insn_p = &insn_data[icode]; machine_mode tmode = insn_p->operand[0].mode; @@ -10362,7 +10345,7 @@ ix86_expand_round_builtin (const struct builtin_description *d, default: gcc_unreachable (); } - gcc_assert (nargs <= ARRAY_SIZE (args)); + gcc_assert (nargs <= ARRAY_SIZE (xops)); if (optimize || target == 0 @@ -10434,34 +10417,31 @@ ix86_expand_round_builtin (const struct builtin_description *d, } } - args[i].op = op; - args[i].mode = mode; + xops[i] = op; } switch (nargs) { case 1: - pat = GEN_FCN (icode) (target, args[0].op); + pat = GEN_FCN (icode) (target, xops[0]); break; case 2: - pat = GEN_FCN (icode) (target, args[0].op, args[1].op); + pat = GEN_FCN (icode) (target, xops[0], xops[1]); break; case 3: - pat = GEN_FCN (icode) (target, args[0].op, args[1].op, - args[2].op); + pat = GEN_FCN (icode) (target, xops[0], xops[1], xops[2]); break; case 4: - pat = GEN_FCN (icode) (target, args[0].op, args[1].op, - args[2].op, args[3].op); + pat = GEN_FCN (icode) (target, xops[0], xops[1], + xops[2], xops[3]); break; case 5: - pat = GEN_FCN (icode) (target, args[0].op, args[1].op, - args[2].op, args[3].op, args[4].op); + pat = GEN_FCN (icode) (target, xops[0], xops[1], + xops[2], xops[3], xops[4]); break; case 6: - pat = GEN_FCN (icode) (target, args[0].op, args[1].op, - args[2].op, args[3].op, args[4].op, - args[5].op); + pat = GEN_FCN (icode) (target, xops[0], xops[1], + xops[2], xops[3], xops[4], xops[5]); break; default: gcc_unreachable (); @@ -10488,11 +10468,7 @@ ix86_expand_special_args_builtin (const struct builtin_description *d, rtx pat, op; unsigned int i, nargs, arg_adjust, memory; bool aligned_mem = false; - struct - { - rtx op; - machine_mode mode; - } args[3]; + rtx xops[3]; enum insn_code icode = d->icode; bool last_arg_constant = false; const struct insn_data_d *insn_p = &insn_data[icode]; @@ -10567,7 +10543,7 @@ ix86_expand_special_args_builtin (const struct builtin_description *d, nargs = 1; klass = store; /* Reserve memory operand for target. */ - memory = ARRAY_SIZE (args); + memory = ARRAY_SIZE (xops); switch (icode) { /* These builtins and instructions require the memory @@ -10704,7 +10680,7 @@ ix86_expand_special_args_builtin (const struct builtin_description *d, nargs = 2; klass = store; /* Reserve memory operand for target. */ - memory = ARRAY_SIZE (args); + memory = ARRAY_SIZE (xops); break; case V4SF_FTYPE_PCV4SF_V4SF_UQI: case V8SF_FTYPE_PCV8SF_V8SF_UQI: @@ -10778,7 +10754,7 @@ ix86_expand_special_args_builtin (const struct builtin_description *d, gcc_unreachable (); } - gcc_assert (nargs <= ARRAY_SIZE (args)); + gcc_assert (nargs <= ARRAY_SIZE (xops)); if (klass == store) { @@ -10869,8 +10845,7 @@ ix86_expand_special_args_builtin (const struct builtin_description *d, } } - args[i].op = op; - args[i].mode = mode; + xops[i]= op; } switch (nargs) @@ -10879,13 +10854,13 @@ ix86_expand_special_args_builtin (const struct builtin_description *d, pat = GEN_FCN (icode) (target); break; case 1: - pat = GEN_FCN (icode) (target, args[0].op); + pat = GEN_FCN (icode) (target, xops[0]); break; case 2: - pat = GEN_FCN (icode) (target, args[0].op, args[1].op); + pat = GEN_FCN (icode) (target, xops[0], xops[1]); break; case 3: - pat = GEN_FCN (icode) (target, args[0].op, args[1].op, args[2].op); + pat = GEN_FCN (icode) (target, xops[0], xops[1], xops[2]); break; default: gcc_unreachable (); @@ -10893,6 +10868,7 @@ ix86_expand_special_args_builtin (const struct builtin_description *d, if (! pat) return 0; + emit_insn (pat); return klass == store ? 0 : target; }