From patchwork Mon May 11 19:52:31 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Uros Bizjak X-Patchwork-Id: 1288036 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=gcc.gnu.org Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=Gfe/OlgK; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49LWnN5CnNz9sPF for ; Tue, 12 May 2020 05:52:54 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id C7FDC3892002; Mon, 11 May 2020 19:52:51 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org C7FDC3892002 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1589226771; bh=8idTt0UdxMVJjnnOKUk7xs1A5EIbavGsR6US8tjFRh4=; h=Date:Subject:To:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:Cc:From; b=Gfe/OlgKOAiHhZethhCxG5reF84kTchwvphVj1U3kmxVSXHyZWIhIC7emFXJN5/Oy 2Ulq5cMvzl4ibRkWtJokFGhJTi30id6OVmPTHb+aXHm/4nCdAHjG/9ndYvIwRpof2U FZ4RvwL3OWfYnFMymttkUyKcYbK9TmenXytGFV1I= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-io1-xd2c.google.com (mail-io1-xd2c.google.com [IPv6:2607:f8b0:4864:20::d2c]) by sourceware.org (Postfix) with ESMTPS id 18D1E386F81C for ; Mon, 11 May 2020 19:52:44 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 18D1E386F81C Received: by mail-io1-xd2c.google.com with SMTP id i19so11196403ioh.12 for ; Mon, 11 May 2020 12:52:44 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:from:date:message-id:subject:to:cc; bh=8idTt0UdxMVJjnnOKUk7xs1A5EIbavGsR6US8tjFRh4=; b=e2MP5Zt5DziR8XcVrrQy3avTdX1L233EKeysd53p99B/wAt/Nj7iQDN5GDBxnhFIAr owi4o5TEledU0R0X0qZ1Dci7o5SuRJrpW+Zy6IUEHICi+vo1Uw6aeFbiR0INT5wFwd12 Nklwqn+zVlb621Zr+VxGwEdQ+ueGaoVcFRAYEaZ4T5fyMAw47UT17qBWJP55zAYgfMg3 7QnmgbFboYUcx+D2lV9+Ifal4Msye85sHapJT6hkQAX313M4yrQvQG7ikg0VpInvF4T2 r+PpuaZXAyU1S5SV/kYRpfeccSF/aejQNUoSQO3CkciZDfCqFyqJCq1SbCxV9+g9aNjO rUHA== X-Gm-Message-State: AGi0PuZ7m4JKKFTi1jhc1Hzp278hC8SpXCUq0C9g7lrLU1MxgpccwMhn ldQ8zt/BdCZ4J2KHIrK4iuY7UAawIvTsoxfzHAFz8SUrAvE= X-Google-Smtp-Source: APiQypI1KkSVgVysVu4NLohWxoEK/9xvhM0nB6i9VE0IvU+gWKTMvL/+Q1gY9neFMpZkSip44s3SIMwTiihv9BRwRXA= X-Received: by 2002:a05:6602:2104:: with SMTP id x4mr7161547iox.55.1589226763293; Mon, 11 May 2020 12:52:43 -0700 (PDT) MIME-Version: 1.0 Date: Mon, 11 May 2020 21:52:31 +0200 Message-ID: Subject: [RFC PATCH] i386: Add V2SFmode FMA insn patterns [PR95046] To: "gcc-patches@gcc.gnu.org" X-Spam-Status: No, score=-10.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Uros Bizjak via Gcc-patches From: Uros Bizjak Reply-To: Uros Bizjak Cc: Jakub Jelinek , Richard Biener Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" Attached patch implements V2SFmode FMA insn patterns. Patched compiler vectorizes FMA, FMS and FNMA instructions, but for some reason fails to vectorize FNMS. I have double checked that the insn pattern is correct, and now I'm all out of ideas what could be wrong with the pattern, still ignored by the vectorizer. -fno-vect-cost-model does not help so it's time to ask the experts... gcc/ChangeLog: 2020-05-11 Uroš Bizjak PR target/95046 * config/i386/mmx.md (fmav2sf4): New insn pattern. (fmsv2sf4): Ditto. (fnmav2sf4): Ditto. (fnmsv2sf4): Ditto. testsuite/ChangeLog: 2020-05-11 Uroš Bizjak PR target/95046 * gcc.target/i386/pr95046-2.c: New test. Otherwise, the patch is bootstrapped and regression tested on x86_64-linux-gnu {,-m32}. Uros. diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md index a8f603b94f8..0024ce761d7 100644 --- a/gcc/config/i386/mmx.md +++ b/gcc/config/i386/mmx.md @@ -345,6 +345,70 @@ (set_attr "prefix" "*,orig,vex") (set_attr "mode" "V2SF,V4SF,V4SF")]) +(define_insn "fmav2sf4" + [(set (match_operand:V2SF 0 "register_operand" "=v,v,x") + (fma:V2SF + (match_operand:V2SF 1 "register_operand" "%0,v,x") + (match_operand:V2SF 2 "register_operand" "v,v,x") + (match_operand:V2SF 3 "register_operand" "v,0,x")))] + "(TARGET_FMA || TARGET_FMA4) && TARGET_MMX_WITH_SSE" + "@ + vfmadd132ps\t{%2, %3, %0|%0, %3, %2} + vfmadd231ps\t{%2, %1, %0|%0, %1, %2} + vfmaddps\t{%3, %2, %1, %0|%0, %1, %2, %3}" + [(set_attr "isa" "fma,fma,fma4") + (set_attr "type" "ssemuladd") + (set_attr "mode" "V4SF")]) + +(define_insn "fmsv2sf4" + [(set (match_operand:V2SF 0 "register_operand" "=v,v,x") + (fma:V2SF + (match_operand:V2SF 1 "register_operand" "%0,v,x") + (match_operand:V2SF 2 "register_operand" "v,v,x") + (neg:V2SF + (match_operand:V2SF 3 "register_operand" "v,0,x"))))] + "(TARGET_FMA || TARGET_FMA4) && TARGET_MMX_WITH_SSE" + "@ + vfmsub132ps\t{%2, %3, %0|%0, %3, %2} + vfmsub231ps\t{%2, %1, %0|%0, %1, %2} + vfmsubps\t{%3, %2, %1, %0|%0, %1, %2, %3}" + [(set_attr "isa" "fma,fma,fma4") + (set_attr "type" "ssemuladd") + (set_attr "mode" "V4SF")]) + +(define_insn "fnmav2sf4" + [(set (match_operand:V2SF 0 "register_operand" "=v,v,x") + (fma:V2SF + (neg:V2SF + (match_operand:V2SF 1 "register_operand" "%0,v,x")) + (match_operand:V2SF 2 "register_operand" "v,v,x") + (match_operand:V2SF 3 "register_operand" "v,0,x")))] + "(TARGET_FMA || TARGET_FMA4) && TARGET_MMX_WITH_SSE" + "@ + vfnmadd132ps\t{%2, %3, %0|%0, %3, %2} + vfnmadd231ps\t{%2, %1, %0|%0, %1, %2} + vfnmaddps\t{%3, %2, %1, %0|%0, %1, %2, %3}" + [(set_attr "isa" "fma,fma,fma4") + (set_attr "type" "ssemuladd") + (set_attr "mode" "V4SF")]) + +(define_insn "fnmsv2sf4" + [(set (match_operand:V2SF 0 "register_operand" "=v,v,x") + (fma:V2SF + (neg:V2SF + (match_operand:V2SF 1 "register_operand" "%0,v,x")) + (match_operand:V2SF 2 "register_operand" "v,v,x") + (neg:V2SF + (match_operand:V2SF 3 "register_operand" "v,0,x"))))] + "(TARGET_FMA || TARGET_FMA4) && TARGET_MMX_WITH_SSE" + "@ + vfnmsub132ps\t{%2, %3, %0|%0, %3, %2} + vfnmsub231ps\t{%2, %1, %0|%0, %1, %2} + vfnmsubps\t{%3, %2, %1, %0|%0, %1, %2, %3}" + [(set_attr "isa" "fma,fma,fma4") + (set_attr "type" "ssemuladd") + (set_attr "mode" "V4SF")]) + (define_expand "mmx_v2sf3" [(set (match_operand:V2SF 0 "register_operand") (smaxmin:V2SF