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Sun, 09 Jun 2024 03:13:08 -0700 (PDT) MIME-Version: 1.0 From: Uros Bizjak Date: Sun, 9 Jun 2024 12:12:57 +0200 Message-ID: Subject: [committed] i386: Implement .SAT_SUB for unsigned scalar integers [PR112600] To: "gcc-patches@gcc.gnu.org" X-Spam-Status: No, score=-8.2 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org The following testcase: unsigned sub_sat (unsigned x, unsigned y) { unsigned res; res = x - y; res &= -(x >= y); return res; } currently compiles (-O2) to: sub_sat: movl %edi, %edx xorl %eax, %eax subl %esi, %edx cmpl %esi, %edi setnb %al negl %eax andl %edx, %eax ret We can expand through ussub{m}3 optab to use carry flag from the subtraction and generate code using SBB instruction implementing: unsigned res = x - y; res &= ~(-(x < y)); sub_sat: subl %esi, %edi sbbl %eax, %eax notl %eax andl %edi, %eax ret PR target/112600 gcc/ChangeLog: * config/i386/i386.md (ussub3): New expander. (sub_3): Ditto. gcc/testsuite/ChangeLog: * gcc.target/i386/pr112600-b.c: New test. Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}. Uros. diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index bc2ef819df6..d69bc8d6e48 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -8436,6 +8436,14 @@ (define_expand "usubv4" "ix86_fixup_binary_operands_no_copy (MINUS, mode, operands, TARGET_APX_NDD);") +(define_expand "sub_3" + [(parallel [(set (reg:CC FLAGS_REG) + (compare:CC + (match_operand:SWI 1 "nonimmediate_operand") + (match_operand:SWI 2 ""))) + (set (match_operand:SWI 0 "register_operand") + (minus:SWI (match_dup 1) (match_dup 2)))])]) + (define_insn "*sub_3" [(set (reg FLAGS_REG) (compare (match_operand:SWI 1 "nonimmediate_operand" "0,0,rm,r") @@ -9883,7 +9891,28 @@ (define_expand "usadd3" emit_insn (gen_add3_cc_overflow_1 (res, operands[1], operands[2])); emit_insn (gen_x86_movcc_0_m1_neg (msk)); dst = expand_simple_binop (mode, IOR, res, msk, - operands[0], 1, OPTAB_DIRECT); + operands[0], 1, OPTAB_WIDEN); + + if (!rtx_equal_p (dst, operands[0])) + emit_move_insn (operands[0], dst); + DONE; +}) + +(define_expand "ussub3" + [(set (match_operand:SWI 0 "register_operand") + (us_minus:SWI (match_operand:SWI 1 "register_operand") + (match_operand:SWI 2 "")))] + "" +{ + rtx res = gen_reg_rtx (mode); + rtx msk = gen_reg_rtx (mode); + rtx dst; + + emit_insn (gen_sub_3 (res, operands[1], operands[2])); + emit_insn (gen_x86_movcc_0_m1_neg (msk)); + msk = expand_simple_unop (mode, NOT, msk, NULL, 1); + dst = expand_simple_binop (mode, AND, res, msk, + operands[0], 1, OPTAB_WIDEN); if (!rtx_equal_p (dst, operands[0])) emit_move_insn (operands[0], dst);