From patchwork Fri Aug 16 15:16:01 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Charles Baylis X-Patchwork-Id: 267679 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "localhost", Issuer "www.qmailtoaster.com" (not verified)) by ozlabs.org (Postfix) with ESMTPS id 9076A2C0274 for ; Sat, 17 Aug 2013 01:16:16 +1000 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:in-reply-to:references:date:message-id:subject :from:to:cc:content-type; q=dns; s=default; b=Il3Opln2EMpkP/WRdf 3x7j3kJsGEJLuTpxRRklOJ0geHqEEr92VR6WqQ3fZgH9DgTl8LdcgSqzqLhQApxS piRns2cX7Ci5lF3dw55gjW2sWCqEumoyq7dwn2BbXCqXQsUQL0WvfrTrc9lIsF6P zSLLT3LaR9UF4brXWYZVCi2hQ= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:in-reply-to:references:date:message-id:subject :from:to:cc:content-type; s=default; bh=AlFZr3wUqtKD+KAA3tA1kyRB ufY=; b=wUz4p8k2tJaNxtyfjl2C2F8pyIZ+NsYK46Dvusq3gZRBpO9T1qwXmfea H6Y4HaoQH1Rr9p+Ecyhk8sn8fCyiliZQ6/N4HZFzbLkUxfpxRReZOk1iTOxxSkgo SxLzFETdpBlxoTa0sPYn3u0eqGw7w5PUWE3edSLDkeW8VuRBzAo= Received: (qmail 31786 invoked by alias); 16 Aug 2013 15:16:06 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 31772 invoked by uid 89); 16 Aug 2013 15:16:06 -0000 X-Spam-SWARE-Status: No, score=-3.0 required=5.0 tests=AWL, BAYES_00, KHOP_RCVD_UNTRUST, KHOP_THREADED, RCVD_IN_DNSWL_LOW, RCVD_IN_HOSTKARMA_YE autolearn=ham version=3.3.2 Received: from mail-la0-f52.google.com (HELO mail-la0-f52.google.com) (209.85.215.52) by sourceware.org (qpsmtpd/0.84/v0.84-167-ge50287c) with ESMTP; Fri, 16 Aug 2013 15:16:04 +0000 Received: by mail-la0-f52.google.com with SMTP id ev20so1566742lab.39 for ; Fri, 16 Aug 2013 08:16:01 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-gm-message-state:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc:content-type; bh=H8ieYgD8keeQHefVVx0F4FqjZUQj2pGjfqN9yvyB1js=; b=caABE8ZsR7q2DFl1i1C1SonHa7mjXGQTVs1thzZAk9n2fnr2Y+S8LPayhmyZ+OuhNe P07yDPjdyeH3fspsOu5yUXIjr+LzcYT2VmY/Ak0OlxaQahAAxJdXxc5WjNtWLONFzbBi cn5uLw0IP9eAvyFHbr3ZC6w9m6wmsBZXfCJq2QXXcyWClr3AWj8xf91BfdvMPbSoVVhJ BEWbVC8Rf7Lnnnb6z7KtK3KPOaAWGKnGROOSNe5wHAXUg1j4yVihuKfNR9CldjMaN1d6 z6HEpKqvLTg4TyBBGwYIQM40Cma//TSPeost8Q8aI1gmObb2NVf65UUwYRSnIihP7IzM GrAQ== X-Gm-Message-State: ALoCoQnC2+rhLB1WRVlCJfLqtjJ9i/qpFGl2QQQviBS5a6FuIhK2+YE8lVe7jSyCDcNcAx00HR9M MIME-Version: 1.0 X-Received: by 10.112.198.39 with SMTP id iz7mr2709257lbc.24.1376666161815; Fri, 16 Aug 2013 08:16:01 -0700 (PDT) Received: by 10.112.3.169 with HTTP; Fri, 16 Aug 2013 08:16:01 -0700 (PDT) In-Reply-To: <520cf024.43f8420a.0d06.1915SMTPIN_ADDED_BROKEN@mx.google.com> References: <520cf024.43f8420a.0d06.1915SMTPIN_ADDED_BROKEN@mx.google.com> Date: Fri, 16 Aug 2013 16:16:01 +0100 Message-ID: Subject: Re: [PATCH, ARM] fix testsuite failures for arm-none-linux-gnueabihf From: Charles Baylis To: Kyrylo Tkachov Cc: GCC Patches , Ramana Radhakrishnan , Richard Earnshaw X-Virus-Found: No Hi Kyrylo Thanks for the comments. I've done version 2 of the patch with the changes incorporated 2013-08-16 Charles Baylis * gcc.dg/builtin-apply2.c: skip test on arm hardfloat ABI targets * gcc.dg/tls/pr42894.c: Use -mfloat-abi=soft as Thumb1 does not support hardfloat ABI * gcc,target/arm/thumb-ltu.c: Use -mfloat-abi=soft as Thumb1 does not support hardfloat ABI * lib/target-supports.exp (check_effective_target_arm_fp16_ok_nocache): don't force -mfloat-abi=soft when building for hardfloat target On 15 August 2013 16:13, Kyrylo Tkachov wrote: > Hi Charles, > > CC'ing some of the ARM maintainers... > >> Hi >> >> The attached patch fixes some tests which fail when testing gcc for a >> arm-none-linux-gnueabihf target because they do not expect to be built >> with a hard float ABI. >> >> The change in target-supports.exp fixes arm-fp16-ops-5.c and arm-fp16- >> ops-6.c. >> >> Tested on arm-none-linux-gnueabihf using qemu-arm, and does not cause >> any other tests to break. >> >> Comments? This is my first patch, so please point out anything wrong. >> > > --- gcc/testsuite/gcc.dg/tls/pr42894.c (revision 201726) > +++ gcc/testsuite/gcc.dg/tls/pr42894.c (working copy) > @@ -1,6 +1,7 @@ > /* PR target/42894 */ > /* { dg-do compile } */ > /* { dg-options "-march=armv5te -mthumb" { target arm*-*-* } } */ > +/* { dg-options "-march=armv5te -mthumb -mfloat-abi=soft" { target arm*-*-*hf > } } */ > /* { dg-require-effective-target tls } */ > > This test also fails for a bare-metal arm-none-eabi target configured with > hard float, so perhaps this could be: > > -/* { dg-options "-march=armv5te -mthumb" { target arm*-*-* } } */ > +/* { dg-options "-march=armv5te -mthumb -mfloat-abi=soft" { target arm*-*-* } > } */ > > >> >> >> >> 2013-08-15 Charles Baylis >> >> * gcc.dg/builtin-apply2.c: skip test on arm hardfloat ABI targets >> * gcc.dg/tls/pr42894.c: Use -mfloat-abi=soft as Thumb1 does >> not support hardfloat ABI >> * arm/thumb-ltu.c: Use -mfloat-abi=soft as Thumb1 does not >> support hardfloat ABI > > ChangeLog entries are specified relative to the ChangeLog location. This > should be: > > * gcc.target/arm/thumb-ltu.c:... > >> * target-supports.exp: don't force -mfloat-abi=soft when >> building for hardfloat target > > Likewise, and also it's a good idea to specify which function/construct you're > changing. In this case I think you're modifying > check_effective_target_arm_fp16_ok_nocache. So this entry would be: > > * lib/target-supports.exp > (check_effective_target_arm_fp16_ok_nocache):... > > > Thanks, > Kyrill > > > > Index: gcc/testsuite/gcc.dg/builtin-apply2.c =================================================================== --- gcc/testsuite/gcc.dg/builtin-apply2.c (revision 201726) +++ gcc/testsuite/gcc.dg/builtin-apply2.c (working copy) @@ -1,6 +1,7 @@ /* { dg-do run } */ /* { dg-skip-if "Variadic funcs have all args on stack. Normal funcs have args in registers." { "aarch64*-*-* avr-*-* " } { "*" } { "" } } */ /* { dg-skip-if "Variadic funcs use Base AAPCS. Normal funcs use VFP variant." { "arm*-*-*" } { "-mfloat-abi=hard" } { "" } } */ +/* { dg-skip-if "Variadic funcs use Base AAPCS. Normal funcs use VFP variant." { "arm*-*-gnueabihf" } { "*" } { "-mfloat-abi=soft*" } } */ /* PR target/12503 */ /* Origin: */ Index: gcc/testsuite/gcc.dg/tls/pr42894.c =================================================================== --- gcc/testsuite/gcc.dg/tls/pr42894.c (revision 201726) +++ gcc/testsuite/gcc.dg/tls/pr42894.c (working copy) @@ -1,6 +1,6 @@ /* PR target/42894 */ /* { dg-do compile } */ -/* { dg-options "-march=armv5te -mthumb" { target arm*-*-* } } */ +/* { dg-options "-march=armv5te -mthumb -mfloat-abi=soft" { target arm*-*-* } } */ /* { dg-require-effective-target tls } */ extern __thread int t; Index: gcc/testsuite/gcc.target/arm/thumb-ltu.c =================================================================== --- gcc/testsuite/gcc.target/arm/thumb-ltu.c (revision 201726) +++ gcc/testsuite/gcc.target/arm/thumb-ltu.c (working copy) @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-skip-if "incompatible options" { arm*-*-* } { "-march=*" } { "-march=armv6" "-march=armv6j" "-march=armv6z" } } */ -/* { dg-options "-mcpu=arm1136jf-s -mthumb -O2" } */ +/* { dg-options "-mcpu=arm1136jf-s -mthumb -O2 -mfloat-abi=soft" } */ void f(unsigned a, unsigned b, unsigned c, unsigned d) { Index: gcc/testsuite/lib/target-supports.exp =================================================================== --- gcc/testsuite/lib/target-supports.exp (revision 201726) +++ gcc/testsuite/lib/target-supports.exp (working copy) @@ -2445,6 +2445,11 @@ proc check_effective_target_arm_fp16_ok_ # Must generate floating-point instructions. return 0 } + if [check-flags [list "" { *-*-gnueabihf } { "*" } { "" } ]] { + # Use existing float-abi and force an fpu which supports fp16 + set et_arm_fp16_flags "-mfpu=vfpv4" + return 1; + } if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] { # The existing -mfpu value is OK; use it, but add softfp. set et_arm_fp16_flags "-mfloat-abi=softfp"