From patchwork Mon Jun 23 06:59:35 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhenqiang Chen X-Patchwork-Id: 362669 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 665B914009B for ; Mon, 23 Jun 2014 17:00:15 +1000 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:date:message-id:subject:from:to:content-type; q= dns; s=default; b=in4HWxhKYPk2vL17vcjd78tnL84qEfe9v2GVoVzI+Jognf 3XvFHCCn48xMzxCZ+E6HB0S5UQ5oEAPvha7SPNOZHXzFSuI0oZagQTM1xKgE/1PL 6yca6ASRtvL7v1EXLxc8qBqlJvCDGvd/3uW0jBHuAs2w8wlBQEzM/Tc+NepvY= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:date:message-id:subject:from:to:content-type; s= default; bh=yisOuA1xGjplfuocLVUSgRPLA+Y=; b=Qwxv/6YIC6OTPZ3MPAhg y65CKFCEaut6C2f96yDkQ5un39M6SgatxktIo4qHfEmBEt/xM4B/a5QiQct/g/Ih EYHMwkOPjs0CWNwVswwcjWXZTxCkhri3wRoTn4U+f+iybFPx0I9G1vQRBVfA7T7H 1EqBBw+DhsDpDKVGe1H+Ikc= Received: (qmail 13596 invoked by alias); 23 Jun 2014 07:00:08 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 13579 invoked by uid 89); 23 Jun 2014 07:00:07 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.5 required=5.0 tests=AWL, BAYES_00, LIKELY_SPAM_BODY, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=no version=3.3.2 X-HELO: mail-lb0-f177.google.com Received: from mail-lb0-f177.google.com (HELO mail-lb0-f177.google.com) (209.85.217.177) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Mon, 23 Jun 2014 06:59:39 +0000 Received: by mail-lb0-f177.google.com with SMTP id u10so3883084lbd.36 for ; Sun, 22 Jun 2014 23:59:35 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:date:message-id:subject:from:to :content-type; bh=gs4UJKaUlyaW8qrEPdUilbHxN79R2AvKWd24qrW/63s=; b=QHfGxH4YT3gtUFwwVIhTzifxoAiR0wUTK4dPomoa0JqIr32UC+PuF/ILuzEDWkdqC2 qEEYCOtMmt5sTPt4egCnVI2ojZOnmw767yv2qKXr+1HXT9LD4Ax8V7IgJQHHxCTnFVpG lnu2ramQ8aqvGxwi02XrmJTLMw11Pk9d+IUHLgYtA4YA8AUdGKVUzw3UxE/nOSvL5k85 q1cKFZKrAPJF0eNLh/BswuKU2LjWNOEiRO5oxMcnOcwaRAHeDNOc/JnPfIEhlBUO4XfR kz6ud74XaxyHZL7cYIDw4jek/rqIKqwkwpRAjCf0L5m12PsDLc3r0aFjULCS+a8+pFf0 jhVw== X-Gm-Message-State: ALoCoQngs6uDyZtBWPyWxAJU7P8bL2Dy1tCDTlISV8/jUcQtSFcGKPOCFI0dFRZHaWLEpeP9NYLq MIME-Version: 1.0 X-Received: by 10.152.198.39 with SMTP id iz7mr399087lac.67.1403506775722; Sun, 22 Jun 2014 23:59:35 -0700 (PDT) Received: by 10.112.13.36 with HTTP; Sun, 22 Jun 2014 23:59:35 -0700 (PDT) Date: Mon, 23 Jun 2014 14:59:35 +0800 Message-ID: Subject: [PATCH, 5/10] aarch64: add ccmp operand predicate From: Zhenqiang Chen To: "gcc-patches@gcc.gnu.org" X-IsSubscribed: yes Hi, The patches defines ccmp operand predicate for AARCH64. OK for trunk? Thanks! -Zhenqiang ChangeLog: 2014-06-23 Zhenqiang Chen * config/aarch64/aarch64-protos.h (aarch64_uimm5): New prototype. * config/aarch64/constraints.md (Usn): Immediate for ccmn. * config/aarch64/predicates.md (aarch64_ccmp_immediate): New. (aarch64_ccmp_operand): New. * config/aarch64/aarch64.c (aarch64_uimm5): New function. diff --git a/gcc/config/aarch64/aarch64-protos.h b/gcc/config/aarch64/aarch64-protos.h index c4f75b3..997ff50 100644 --- a/gcc/config/aarch64/aarch64-protos.h +++ b/gcc/config/aarch64/aarch64-protos.h @@ -246,6 +246,8 @@ void aarch64_init_expanders (void); void aarch64_print_operand (FILE *, rtx, char); void aarch64_print_operand_address (FILE *, rtx); +bool aarch64_uimm5 (HOST_WIDE_INT); + /* Initialize builtins for SIMD intrinsics. */ void init_aarch64_simd_builtins (void); diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index f2968ff..ecf88f9 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -9566,6 +9566,13 @@ aarch64_expand_movmem (rtx *operands) return true; } +/* Return true if val can be encoded as a 5-bit unsigned immediate. */ +bool +aarch64_uimm5 (HOST_WIDE_INT val) +{ + return (val & (HOST_WIDE_INT) 0x1f) == val; +} + #undef TARGET_ADDRESS_COST #define TARGET_ADDRESS_COST aarch64_address_cost diff --git a/gcc/config/aarch64/constraints.md b/gcc/config/aarch64/constraints.md index 807d0b1..bb6a8a1 100644 --- a/gcc/config/aarch64/constraints.md +++ b/gcc/config/aarch64/constraints.md @@ -89,6 +89,11 @@ (and (match_code "const_int") (match_test "(unsigned HOST_WIDE_INT) ival < 32"))) +(define_constraint "Usn" + "A constant that can be used with a CCMN operation (once negated)." + (and (match_code "const_int") + (match_test "aarch64_uimm5 (-ival)"))) + (define_constraint "Usd" "@internal A constraint that matches an immediate shift constant in DImode." diff --git a/gcc/config/aarch64/predicates.md b/gcc/config/aarch64/predicates.md index 2702a3c..dd35714 100644 --- a/gcc/config/aarch64/predicates.md +++ b/gcc/config/aarch64/predicates.md @@ -30,6 +30,15 @@ (ior (match_code "symbol_ref") (match_operand 0 "register_operand"))) +(define_predicate "aarch64_ccmp_immediate" + (and (match_code "const_int") + (ior (match_test "aarch64_uimm5 (INTVAL (op))") + (match_test "aarch64_uimm5 (-INTVAL (op))")))) + +(define_predicate "aarch64_ccmp_operand" + (ior (match_operand 0 "register_operand") + (match_operand 0 "aarch64_ccmp_immediate"))) + (define_predicate "aarch64_simd_register" (and (match_code "reg") (ior (match_test "REGNO_REG_CLASS (REGNO (op)) == FP_LO_REGS")