Index: testsuite/gcc.target/i386/intrinsics_4.c
===================================================================
--- testsuite/gcc.target/i386/intrinsics_4.c	(revision 0)
+++ testsuite/gcc.target/i386/intrinsics_4.c	(revision 0)
@@ -0,0 +1,14 @@
+/* Test case to check if intrinsics and function specific target
+   optimizations work together.  Check by including immintrin.h  */
+
+/* { dg-do compile } */
+/* { dg-options "-O2 -msse -mno-avx" } */
+
+#include <immintrin.h>
+
+__m256 a[10], b[10], c[10];
+void __attribute__((target ("avx")))
+foo (void)
+{
+  a[0] = _mm256_and_ps (b[0], c[0]);
+}
Index: testsuite/gcc.target/i386/intrinsics_1.c
===================================================================
--- testsuite/gcc.target/i386/intrinsics_1.c	(revision 0)
+++ testsuite/gcc.target/i386/intrinsics_1.c	(revision 0)
@@ -0,0 +1,13 @@
+/* Test case to check if intrinsics and function specific target
+   optimizations work together.  Check by including x86intrin.h  */
+
+/* { dg-do compile } */
+/* { dg-options "-O2 -msse -mno-sse4.1 -mno-sse4.2" } */
+
+#include <x86intrin.h>
+
+__attribute__((target("sse4.2")))
+__m128i foo(__m128i *V)
+{
+    return _mm_stream_load_si128(V);
+}
Index: testsuite/gcc.target/i386/intrinsics_2.c
===================================================================
--- testsuite/gcc.target/i386/intrinsics_2.c	(revision 0)
+++ testsuite/gcc.target/i386/intrinsics_2.c	(revision 0)
@@ -0,0 +1,13 @@
+/* Test case to check if intrinsics and function specific target
+   optimizations work together.  Check by including immintrin.h  */
+
+/* { dg-do compile } */
+/* { dg-options "-O2 -msse -mno-sse4.1" } */
+
+#include <immintrin.h>
+
+__attribute__((target("sse4.2")))
+__m128i foo(__m128i *V)
+{
+    return _mm_stream_load_si128(V);
+}
Index: testsuite/gcc.target/i386/intrinsics_3.c
===================================================================
--- testsuite/gcc.target/i386/intrinsics_3.c	(revision 0)
+++ testsuite/gcc.target/i386/intrinsics_3.c	(revision 0)
@@ -0,0 +1,14 @@
+/* Test case to check if intrinsics and function specific target
+   optimizations work together.  Check if the POPCNT specific intrinsics
+   in included with popcntintrin.h get enabled by including immintrin.h  */
+
+/* { dg-do compile } */
+/* { dg-options "-O2 -msse -mno-sse4.1 -mno-sse4.2 -mno-popcnt" } */
+
+#include <immintrin.h>
+
+__attribute__((target("popcnt")))
+long long foo(unsigned long long X)
+{
+    return _mm_popcnt_u64 (X);
+}
Index: config/i386/x86intrin.h
===================================================================
--- config/i386/x86intrin.h	(revision 198950)
+++ config/i386/x86intrin.h	(working copy)
@@ -26,95 +26,341 @@
 
 #include <ia32intrin.h>
 
-#ifdef __MMX__
+#ifndef __MMX__
+#pragma GCC push_options
+#pragma GCC target("mmx")
+#define __MMX__
+#define __DISABLE_MMX__
+#endif
+
 #include <mmintrin.h>
+
+#ifdef __DISABLE_MMX__
+#undef __DISABLE_MMX__
+#undef __MMX__
+#pragma GCC pop_options
 #endif
 
-#ifdef __SSE__
+#ifndef __SSE__
+#pragma GCC push_options
+#pragma GCC target("sse")
+#define __SSE__
+#define __DISABLE_SSE__
+#endif
+
 #include <xmmintrin.h>
+
+#ifdef __DISABLE_SSE__
+#undef __DISABLE_SSE__
+#undef __SSE__
+#pragma GCC pop_options
 #endif
 
-#ifdef __SSE2__
+#ifndef __SSE2__
+#pragma GCC push_options
+#pragma GCC target("sse2")
+#define __SSE2__
+#define __DISABLE_SSE2__
+#endif
+
 #include <emmintrin.h>
+
+#ifdef __DISABLE_SSE2__
+#undef __DISABLE_SSE2__
+#undef __SSE2__
+#pragma GCC pop_options
 #endif
 
-#ifdef __SSE3__
+#ifndef __SSE3__
+#pragma GCC push_options
+#pragma GCC target("sse3")
+#define __SSE3__
+#define __DISABLE_SSE3__
+#endif
+
 #include <pmmintrin.h>
+
+#ifdef __DISABLE_SSE3__
+#undef __DISABLE_SSE3__
+#undef __SSE3__
+#pragma GCC pop_options
 #endif
 
-#ifdef __SSSE3__
+#ifndef __SSSE3__
+#pragma GCC push_options
+#pragma GCC target("ssse3")
+#define __SSSE3__
+#define __DISABLE_SSSE3__
+#endif
+
 #include <tmmintrin.h>
+
+#ifdef __DISABLE_SSSE3__
+#undef __DISABLE_SSSE3__
+#undef __SSSE3__
+#pragma GCC pop_options
 #endif
 
-#ifdef __SSE4A__
+#ifndef __SSE4A__
+#pragma GCC push_options
+#pragma GCC target("sse4a")
+#define __SSE4A__
+#define __DISABLE_SSE4A__
+#endif
+
 #include <ammintrin.h>
+
+#ifdef __DISABLE_SSE4A__
+#undef __DISABLE_SSE4A__
+#undef __SSE4A__
+#pragma GCC pop_options
 #endif
 
-#if defined (__SSE4_2__) || defined (__SSE4_1__)
+#if !defined (__SSE4_2__) && !defined (__SSE4_1__)
+#pragma GCC push_options
+#pragma GCC target("sse4.2,sse4.1")
+#define __SSE4_2__
+#define __SSE4_1__
+#define __DISABLE_SSE4_2__
+#endif
+
 #include <smmintrin.h>
+
+#ifdef __DISABLE_SSE4_2__
+#undef __DISABLE_SSE4_2__
+#undef __SSE4_2__
+#undef __SSE4_1__
+#pragma GCC pop_options
 #endif
 
-#if defined (__AES__) || defined (__PCLMUL__)
+#if !defined (__AES__) && !defined (__PCLMUL__)
+#pragma GCC push_options
+#pragma GCC target("aes,pclmul")
+#define __AES__
+#define __PCLMUL__
+#define __DISABLE_AES_PCLMUL__
+#endif
+
 #include <wmmintrin.h>
+
+#ifdef __DISABLE_AES_PCLMUL__
+#undef __DISABLE_AES_PCLMUL__
+#undef __AES__
+#undef __PCLMUL__
+#pragma GCC pop_options
 #endif
 
 /* For including AVX instructions */
 #include <immintrin.h>
 
-#ifdef __3dNOW__
+#ifndef __3dNOW__
+#pragma GCC push_options
+#pragma GCC target("3dnow")
+#define __3dNOW__
+#define __DISABLE_3dNOW__
+#endif
+
 #include <mm3dnow.h>
+
+#ifdef __DISABLE_3dNOW__
+#undef __DISABLE_3dNOW__
+#undef __3dNOW__
+#pragma GCC pop_options
 #endif
 
-#ifdef __FMA4__
+#ifndef __FMA4__
+#pragma GCC push_options
+#pragma GCC target("fma4")
+#define __FMA4__
+#define __DISABLE_FMA4__
+#endif
+
 #include <fma4intrin.h>
+
+#ifdef __DISABLE_FMA4__
+#undef __DISABLE_FMA4__
+#undef __FMA4__
+#pragma GCC pop_options
 #endif
 
-#ifdef __XOP__
+#ifndef __XOP__
+#pragma GCC push_options
+#pragma GCC target("xop")
+#define __XOP__
+#define __DISABLE_XOP__
+#endif
+
 #include <xopintrin.h>
+
+#ifdef __DISABLE_XOP__
+#undef __DISABLE_XOP__
+#undef __XOP__
+#pragma GCC pop_options
 #endif
 
-#ifdef __LWP__
+#ifndef __LWP__
+#pragma GCC push_options
+#pragma GCC target("lwp")
+#define __LWP__
+#define __DISABLE_LWP__
+#endif
+
 #include <lwpintrin.h>
+
+#ifdef __DISABLE_LWP__
+#undef __DISABLE_LWP__
+#undef __LWP__
+#pragma GCC pop_options
 #endif
 
-#ifdef __BMI__
+#ifndef __BMI__
+#pragma GCC push_options
+#pragma GCC target("bmi")
+#define __BMI__
+#define __DISABLE_BMI__
+#endif
+
 #include <bmiintrin.h>
+
+#ifdef __DISABLE_BMI__
+#undef __DISABLE_BMI__
+#undef __BMI__
+#pragma GCC pop_options
 #endif
 
-#ifdef __BMI2__
+#ifndef __BMI2__
+#pragma GCC push_options
+#pragma GCC target("bmi2")
+#define __BMI2__
+#define __DISABLE_BMI2__
+#endif
+
 #include <bmi2intrin.h>
+
+#ifdef __DISABLE_BMI2__
+#undef __DISABLE_BMI2__
+#undef __BMI2__
+#pragma GCC pop_options
 #endif
 
-#ifdef __TBM__
+#ifndef __TBM__
+#pragma GCC push_options
+#pragma GCC target("tbm")
+#define __TBM__
+#define __DISABLE_TBM__
+#endif
+
 #include <tbmintrin.h>
+
+#ifdef __DISABLE_TBM__
+#undef __DISABLE_TBM__
+#undef __TBM__
+#pragma GCC pop_options
 #endif
 
-#ifdef __LZCNT__
+#ifndef __LZCNT__
+#pragma GCC push_options
+#pragma GCC target("lzcnt")
+#define __LZCNT__
+#define __DISABLE_LZCNT__
+#endif
+
 #include <lzcntintrin.h>
+
+#ifdef __DISABLE_LZCNT__
+#undef __DISABLE_LZCNT__
+#undef __LZCNT__
+#pragma GCC pop_options
 #endif
 
-#ifdef __POPCNT__
+#ifndef __POPCNT__
+#pragma GCC push_options
+#pragma GCC target("popcnt")
+#define __POPCNT__
+#define __DISABLE_POPCNT__
+#endif
+
 #include <popcntintrin.h>
+
+#ifdef __DISABLE_POPCNT__
+#undef __DISABLE_POPCNT__
+#undef __POPCNT__
+#pragma GCC pop_options
 #endif
 
-#ifdef __RDSEED__
+#ifndef __RDSEED__
+#pragma GCC push_options
+#pragma GCC target("rdseed")
+#define __RDSEED__
+#define __DISABLE_RDSEED__
+#endif
+
 #include <rdseedintrin.h>
+
+#ifdef __DISABLE_RDSEED__
+#undef __DISABLE_RDSEED__
+#undef __RDSEED__
+#pragma GCC pop_options
 #endif
 
-#ifdef __PRFCHW__
+#ifndef __PRFCHW__
+#pragma GCC push_options
+#pragma GCC target("prfchw")
+#define __PRFCHW__
+#define __DISABLE_PRFCHW__
+#endif
+
 #include <prfchwintrin.h>
+
+#ifdef __DISABLE_PRFCHW__
+#undef __DISABLE_PRFCHW__
+#undef __PRFCHW__
+#pragma GCC pop_options
 #endif
 
-#ifdef __FXSR__
+#ifndef __FXSR__
+#pragma GCC push_options
+#pragma GCC target("fxsr")
+#define __FXSR__
+#define __DISABLE_FXSR__
+#endif
+
 #include <fxsrintrin.h>
+
+#ifdef __DISABLE_FXSR__
+#undef __DISABLE_FXSR__
+#undef __FXSR__
+#pragma GCC pop_options
 #endif
 
-#ifdef __XSAVE__
+#ifndef __XSAVE__
+#pragma GCC push_options
+#pragma GCC target("xsave")
+#define __XSAVE__
+#define __DISABLE_XSAVE__
+#endif
+
 #include <xsaveintrin.h>
+
+#ifdef __DISABLE_XSAVE__
+#undef __DISABLE_XSAVE__
+#undef __XSAVE__
+#pragma GCC pop_options
 #endif
 
-#ifdef __XSAVEOPT__
+#ifndef __XSAVEOPT__
+#pragma GCC push_options
+#pragma GCC target("xsaveopt")
+#define __XSAVEOPT__
+#define __DISABLE_XSAVEOPT__
+#endif
+
 #include <xsaveoptintrin.h>
+
+#ifdef __DISABLE_XSAVEOPT__
+#undef __DISABLE_XSAVEOPT__
+#undef __XSAVEOPT__
+#pragma GCC pop_options
 #endif
 
 #include <adxintrin.h>
Index: config/i386/i386-c.c
===================================================================
--- config/i386/i386-c.c	(revision 198950)
+++ config/i386/i386-c.c	(working copy)
@@ -369,20 +369,23 @@ ix86_pragma_target_parse (tree args, tree pop_targ
 
   if (! args)
     {
-      cur_tree = ((pop_target)
-		  ? pop_target
-		  : target_option_default_node);
+      cur_tree = (pop_target ? pop_target : target_option_default_node);
       cl_target_option_restore (&global_options,
 				TREE_TARGET_OPTION (cur_tree));
     }
   else
     {
       cur_tree = ix86_valid_target_attribute_tree (args);
-      if (!cur_tree)
-	return false;
+      if (!cur_tree || cur_tree == error_mark_node)
+       {
+         cl_target_option_restore (&global_options,
+                                   TREE_TARGET_OPTION (prev_tree));
+         return false;
+       }
     }
 
   target_option_current_node = cur_tree;
+  ix86_reset_previous_fndecl ();
 
   /* Figure out the previous/current isa, arch, tune and the differences.  */
   prev_opt  = TREE_TARGET_OPTION (prev_tree);
Index: config/i386/immintrin.h
===================================================================
--- config/i386/immintrin.h	(revision 198950)
+++ config/i386/immintrin.h	(working copy)
@@ -24,71 +24,259 @@
 #ifndef _IMMINTRIN_H_INCLUDED
 #define _IMMINTRIN_H_INCLUDED
 
-#ifdef __MMX__
+#ifndef __MMX__
+#pragma GCC push_options
+#pragma GCC target("mmx")
+#define __MMX__
+#define __DISABLE_MMX__
+#endif
+
 #include <mmintrin.h>
+
+#ifdef __DISABLE_MMX__
+#undef __DISABLE_MMX__
+#undef __MMX__
+#pragma GCC pop_options
 #endif
 
-#ifdef __SSE__
+#ifndef __SSE__
+#pragma GCC push_options
+#pragma GCC target("sse")
+#define __SSE__
+#define __DISABLE_SSE__
+#endif
+
 #include <xmmintrin.h>
+
+#ifdef __DISABLE_SSE__
+#undef __DISABLE_SSE__
+#undef __SSE__
+#pragma GCC pop_options
 #endif
 
-#ifdef __SSE2__
+#ifndef __SSE2__
+#pragma GCC push_options
+#pragma GCC target("sse2")
+#define __SSE2__
+#define __DISABLE_SSE2__
+#endif
+
 #include <emmintrin.h>
+
+#ifdef __DISABLE_SSE2__
+#undef __DISABLE_SSE2__
+#undef __SSE2__
+#pragma GCC pop_options
 #endif
 
-#ifdef __SSE3__
+#ifndef __SSE3__
+#pragma GCC push_options
+#pragma GCC target("sse3")
+#define __SSE3__
+#define __DISABLE_SSE3__
+#endif
+
 #include <pmmintrin.h>
+
+#ifdef __DISABLE_SSE3__
+#undef __DISABLE_SSE3__
+#undef __SSE3__
+#pragma GCC pop_options
 #endif
 
-#ifdef __SSSE3__
+#ifndef __SSSE3__
+#pragma GCC push_options
+#pragma GCC target("ssse3")
+#define __SSSE3__
+#define __DISABLE_SSSE3__
+#endif
+
 #include <tmmintrin.h>
+
+#ifdef __DISABLE_SSSE3__
+#undef __DISABLE_SSSE3__
+#undef __SSSE3__
+#pragma GCC pop_options
 #endif
 
-#if defined (__SSE4_2__) || defined (__SSE4_1__)
+#if !defined (__SSE4_2__) && !defined (__SSE4_1__)
+#pragma GCC push_options
+#pragma GCC target("sse4.2,sse4.1")
+#define __SSE4_1__
+#define __SSE4_2__
+#define __DISABLE_SSE4_2__
+#endif
+
 #include <smmintrin.h>
+
+#ifdef __DISABLE_SSE4_2__
+#undef __DISABLE_SSE4_2__
+#undef __SSE4_1__
+#undef __SSE4_2__
+#pragma GCC pop_options
 #endif
 
-#if defined (__AES__) || defined (__PCLMUL__)
+#ifndef __POPCNT__
+#pragma GCC push_options
+#pragma GCC target("popcnt")
+#define __POPCNT__
+#define __DISABLE_POPCNT__
+#endif
+
+#include <popcntintrin.h>
+
+#ifdef __DISABLE_POPCNT__
+#undef __DISABLE_POPCNT__
+#undef __POPCNT__
+#pragma GCC pop_options
+#endif
+
+#if !defined (__AES__) && !defined (__PCLMUL__)
+#pragma GCC push_options
+#pragma GCC target("aes,pclmul")
+#define __AES__
+#define __PCLMUL__
+#define __DISABLE_AES_PCLMUL__
+#endif
+
 #include <wmmintrin.h>
+
+#ifdef __DISABLE_AES_PCLMUL__
+#undef __DISABLE_AES_PCLMUL__
+#undef __AES__
+#undef __PCLMUL__
+#pragma GCC pop_options
 #endif
 
-#ifdef __AVX__
+
+#ifndef __AVX__
+#pragma GCC push_options
+#pragma GCC target("avx")
+#define __AVX__
+#define __DISABLE_AVX__
+#endif
+
 #include <avxintrin.h>
+
+#ifdef __DISABLE_AVX__
+#undef __DISABLE_AVX__
+#undef __AVX__
+#pragma GCC pop_options
 #endif
 
-#ifdef __AVX2__
+#ifndef __AVX2__
+#pragma GCC push_options
+#pragma GCC target("avx2")
+#define __AVX2__
+#define __DISABLE_AVX2__
+#endif
+
 #include <avx2intrin.h>
+
+#ifdef __DISABLE_AVX2__
+#undef __DISABLE_AVX2__
+#undef __AVX2__
+#pragma GCC pop_options
 #endif
 
-#ifdef __LZCNT__
+#ifndef __LZCNT__
+#pragma GCC push_options
+#pragma GCC target("lzcnt")
+#define __LZCNT__
+#define __DISABLE_LZCNT__
+#endif
+
 #include <lzcntintrin.h>
+
+#ifdef __DISABLE_LZCNT__
+#undef __DISABLE_LZCNT__
+#undef __LZCNT__
+#pragma GCC pop_options
 #endif
 
-#ifdef __BMI__
+#ifndef __BMI__
+#pragma GCC push_options
+#pragma GCC target("bmi")
+#define __BMI__
+#define __DISABLE_BMI__
+#endif
+
 #include <bmiintrin.h>
+
+#ifdef __DISABLE_BMI__
+#undef __DISABLE_BMI__
+#undef __BMI__
+#pragma GCC pop_options
 #endif
 
-#ifdef __BMI2__
+#ifndef __BMI2__
+#pragma GCC push_options
+#pragma GCC target("bmi2")
+#define __BMI2__
+#define __DISABLE_BMI2__
+#endif
+
 #include <bmi2intrin.h>
+
+#ifdef __DISABLE_BMI2__
+#undef __DISABLE_BMI2__
+#undef __BMI2__
+#pragma GCC pop_options
 #endif
 
-#ifdef __FMA__
+#ifndef __FMA__
+#pragma GCC push_options
+#pragma GCC target("fma")
+#define __FMA__
+#define __DISABLE_FMA__
+#endif
+
 #include <fmaintrin.h>
+
+#ifdef __DISABLE_FMA__
+#undef __DISABLE_FMA__
+#undef __FMA__
+#pragma GCC pop_options
 #endif
 
-#ifdef __F16C__
+#ifndef __F16C__
+#pragma GCC push_options
+#pragma GCC target("f16c")
+#define __F16C__
+#define __DISABLE_F16C__
+#endif
+
 #include <f16cintrin.h>
+
+#ifdef __DISABLE_F16C__
+#undef __DISABLE_F16C__
+#undef __F16C__
+#pragma GCC pop_options
 #endif
 
-#ifdef __RTM__
-#include <rtmintrin.h>
+#ifndef __RTM__
+#pragma GCC push_options
+#pragma GCC target("rtm")
+#define __RTM__
+#define __DISABLE_RTM__
 #endif
 
-#ifdef __RTM__
+#include <rtmintrin.h>
 #include <xtestintrin.h>
+
+#ifdef __DISABLE_RTM__
+#undef __DISABLE_RTM__
+#undef __RTM__
+#pragma GCC pop_options
 #endif
 
-#ifdef __RDRND__
+
+#ifndef __RDRND__
+#pragma GCC push_options
+#pragma GCC target("rdrnd")
+#define __RDRND__
+#define __DISABLE_RDRND__
+#endif
 extern __inline int
 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 _rdrand16_step (unsigned short *__P)
@@ -102,10 +290,20 @@ _rdrand32_step (unsigned int *__P)
 {
   return __builtin_ia32_rdrand32_step (__P);
 }
-#endif /* __RDRND__ */
+#ifdef __DISABLE_RDRND__
+#undef __DISABLE_RDRND__
+#undef __RDRND__
+#pragma GCC pop_options
+#endif
 
 #ifdef  __x86_64__
-#ifdef __FSGSBASE__
+
+#ifndef __FSGSBASE__
+#pragma GCC push_options
+#pragma GCC target("fsgsbase")
+#define __FSGSBASE__
+#define __DISABLE_FSGSBASE__
+#endif
 extern __inline unsigned int
 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 _readfsbase_u32 (void)
@@ -161,16 +359,30 @@ _writegsbase_u64 (unsigned long long __B)
 {
   __builtin_ia32_wrgsbase64 (__B);
 }
-#endif /* __FSGSBASE__ */
+#ifdef __DISABLE_FSGSBASE__
+#undef __DISABLE_FSGSBASE__
+#undef __FSGSBASE__
+#pragma GCC pop_options
+#endif
 
-#ifdef __RDRND__
+#ifndef __RDRND__
+#pragma GCC push_options
+#pragma GCC target("rdrnd")
+#define __RDRND__
+#define __DISABLE_RDRND__
+#endif
 extern __inline int
 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 _rdrand64_step (unsigned long long *__P)
 {
   return __builtin_ia32_rdrand64_step (__P);
 }
-#endif /* __RDRND__ */
+#ifdef __DISABLE_RDRND__
+#undef __DISABLE_RDRND__
+#undef __RDRND__
+#pragma GCC pop_options
+#endif
+
 #endif /* __x86_64__  */
 
 #endif /* _IMMINTRIN_H_INCLUDED */
Index: config/i386/i386-protos.h
===================================================================
--- config/i386/i386-protos.h	(revision 198950)
+++ config/i386/i386-protos.h	(working copy)
@@ -40,6 +40,8 @@ extern void ix86_output_addr_diff_elt (FILE *, int
 extern enum calling_abi ix86_cfun_abi (void);
 extern enum calling_abi ix86_function_type_abi (const_tree);
 
+extern void ix86_reset_previous_fndecl (void);
+
 #ifdef RTX_CODE
 extern int standard_80387_constant_p (rtx);
 extern const char *standard_80387_constant_opcode (rtx);
Index: config/i386/i386.c
===================================================================
--- config/i386/i386.c	(revision 198950)
+++ config/i386/i386.c	(working copy)
@@ -4564,6 +4564,13 @@ ix86_can_inline_p (tree caller, tree callee)
 /* Remember the last target of ix86_set_current_function.  */
 static GTY(()) tree ix86_previous_fndecl;
 
+/* Invalidate ix86_previous_fndecl cache.  */
+void
+ix86_reset_previous_fndecl (void)
+{
+  ix86_previous_fndecl = NULL_TREE;
+}
+
 /* Establish appropriate back-end context for processing the function
    FNDECL.  The argument might be NULL to indicate processing at top
    level, outside of any function scope.  */
Index: common/config/i386/i386-common.c
===================================================================
--- common/config/i386/i386-common.c	(revision 198950)
+++ common/config/i386/i386-common.c	(working copy)
@@ -87,6 +87,7 @@ along with GCC; see the file COPYING3.  If not see
 
 #define OPTION_MASK_ISA_BMI_SET OPTION_MASK_ISA_BMI
 #define OPTION_MASK_ISA_BMI2_SET OPTION_MASK_ISA_BMI2
+#define OPTION_MASK_ISA_LZCNT_SET OPTION_MASK_ISA_LZCNT
 #define OPTION_MASK_ISA_TBM_SET OPTION_MASK_ISA_TBM
 #define OPTION_MASK_ISA_POPCNT_SET OPTION_MASK_ISA_POPCNT
 #define OPTION_MASK_ISA_CX16_SET OPTION_MASK_ISA_CX16
@@ -154,6 +155,7 @@ along with GCC; see the file COPYING3.  If not see
 #define OPTION_MASK_ISA_ABM_UNSET OPTION_MASK_ISA_ABM
 #define OPTION_MASK_ISA_BMI_UNSET OPTION_MASK_ISA_BMI
 #define OPTION_MASK_ISA_BMI2_UNSET OPTION_MASK_ISA_BMI2
+#define OPTION_MASK_ISA_LZCNT_UNSET OPTION_MASK_ISA_LZCNT
 #define OPTION_MASK_ISA_TBM_UNSET OPTION_MASK_ISA_TBM
 #define OPTION_MASK_ISA_POPCNT_UNSET OPTION_MASK_ISA_POPCNT
 #define OPTION_MASK_ISA_CX16_UNSET OPTION_MASK_ISA_CX16
@@ -438,6 +440,18 @@ ix86_handle_option (struct gcc_options *opts,
 	}
       return true;
 
+    case OPT_mlzcnt:
+      if (value)
+	{
+	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_LZCNT_SET;
+	  opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_LZCNT_SET;
+	}
+      else
+	{
+	  opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_LZCNT_UNSET;
+	  opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_LZCNT_UNSET;
+	}
+
     case OPT_mtbm:
       if (value)
 	{
