From patchwork Wed Nov 14 22:22:33 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Pinski X-Patchwork-Id: 199038 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id 564812C00A3 for ; Thu, 15 Nov 2012 09:22:44 +1100 (EST) Comment: DKIM? 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Anyways you should look into removing >>> TARGET_PROMOTE_PROTOTYPES because I found that also fixes the problem >>> mentioned here. >>> >>> Thanks, >>> Andrew Pinski >> >> Removing TARGET_PROMOTE_PROTOTYPES looks interesting but I don't know if >> it is possible for compatibility reasons. I am still looking at my >> example though, I see GCC doing: >> >> andi $5,$5,0x1 >> xori $5,$5,0x1 >> movz $2,$4,$5 >> >> When it should just do: >> >> andi $5,$5,0x1 >> movn $2,$4,$5 > > Yes I have a few patches for improving this case. I have not > submitted them yet though. > Attached is the assembly I get from a 4.7 toolchain with all of the > changes I have internally applied; this is for n32 (though o32 > produces the exact same code in this case). I will try to post some > more in the next coming weeks. Removing Richard B. from the CC list since this is now a MIPS specific change (the original patch is still needed though). Here is the patch which should improve the above case. I have not tested it on the trunk yet but it applies there. Basically the *mov_on__ne pattern is the one which is needed in this case. The other two changes are done for 64bit comparisons. Thanks, Andrew Pinski > > Thanks, > Andrew Pinski > > >> >> >> Steve Ellcey >> sellcey@mips.com >> >> commit 8ca1e58de404bbe82b93bc240ef28c68c681243d Author: Andrew Pinski Date: Thu Jul 26 18:09:34 2012 -0700 2012-07-26 Andrew Pinski Bug #3261 * config/mips/mips.md (*mov_on_): Remove mode check from comparisons. (*mov_on_): Likewise. (*mov_on__ne): New pattern to match when (ne A 0) can be just A. * testsuite/gcc.target/mips/movcc-4.c: New testcase. diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index 0dff58e..a1e9568 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -6765,7 +6765,7 @@ (define_insn "*mov_on_" [(set (match_operand:GPR 0 "register_operand" "=d,d") (if_then_else:GPR - (match_operator:MOVECC 4 "equality_operator" + (match_operator 4 "equality_operator" [(match_operand:MOVECC 1 "register_operand" ",") (const_int 0)]) (match_operand:GPR 2 "reg_or_0_operand" "dJ,0") @@ -6777,10 +6777,23 @@ [(set_attr "type" "condmove") (set_attr "mode" "")]) +(define_insn "*mov_on__ne" + [(set (match_operand:GPR 0 "register_operand" "=d,d") + (if_then_else:GPR + (match_operand:GPR2 1 "register_operand" ",") + (match_operand:GPR 2 "reg_or_0_operand" "dJ,0") + (match_operand:GPR 3 "reg_or_0_operand" "0,dJ")))] + "ISA_HAS_CONDMOVE" + "@ + movn\t%0,%z2,%1 + movz\t%0,%z3,%1" + [(set_attr "type" "condmove") + (set_attr "mode" "")]) + (define_insn "*mov_on_" [(set (match_operand:SCALARF 0 "register_operand" "=f,f") (if_then_else:SCALARF - (match_operator:MOVECC 4 "equality_operator" + (match_operator 4 "equality_operator" [(match_operand:MOVECC 1 "register_operand" ",") (const_int 0)]) (match_operand:SCALARF 2 "register_operand" "f,0") diff --git a/gcc/testsuite/gcc.target/mips/movcc-4.c b/gcc/testsuite/gcc.target/mips/movcc-4.c new file mode 100644 index 0000000..d364a52 --- /dev/null +++ b/gcc/testsuite/gcc.target/mips/movcc-4.c @@ -0,0 +1,13 @@ +/* { dg-options "-O2 isa>=4" } */ +/* { dg-final { scan-assembler-times "movz\t|movn\t" 1 } } */ +/* { dg-final { scan-assembler-not "bbit0\t|bbit1\t" } } */ +/* { dg-final { scan-assembler-not "xori\t|xor\t" } } */ + +NOMIPS16 int f(int a, int b, int c) +{ + int d = a&0x1; + if (d==1) + return b; + return c; +} +