diff mbox

[MIPS] Add -march=octeon+ support for GCC

Message ID CA+=Sn1=o3K2vtT-doPK2-B3mkoQ-OVpsRUqD7J_91eo=Z+6baQ@mail.gmail.com
State New
Headers show

Commit Message

Andrew Pinski Dec. 7, 2011, 7:15 p.m. UTC 
On Tue, Dec 6, 2011 at 6:28 PM, Andrew Pinski <pinskia@gmail.com> wrote:
> Hi,
>  This patch adds -march=octeon+ to GCC.
> OK? Bootstrapped and tested on mips64-linux-gnu configured with
> --with-arch=octeon+ .
>
> Thanks,
> Andrew Pinski
>
> gcc/ChangeLog:
> * mips/mips-cpus.def (octeon+): New CPU.
> * config/mips/mips-tables.opt: Regenerate.
> * config/mips/mips.h (MIPS_CPP_SET_PROCESSOR): Emit '+' as 'P'.
>
> testsuite/ChangeLog:
> * gcc.target/mips/mult-1.c: Forbit all Octeon processors.
> * gcc.target/mips/dmult-1.c: Likewise.
> * gcc.target/mips/branch-1.c: Likewise.
> * gcc.target/mips/extend-1.c: Likewise.

Woops I forgot the patch.

Thanks,
Andrew Pinski

Comments

Richard Sandiford Dec. 8, 2011, 8:43 p.m. UTC | #1 
Andrew Pinski <andrew.pinski@caviumnetworks.com> writes:
>> gcc/ChangeLog:
>> * mips/mips-cpus.def (octeon+): New CPU.

config/mips/mips-cpus.def

>> testsuite/ChangeLog:
>> * gcc.target/mips/mult-1.c: Forbit all Octeon processors.

Forbid.

> @@ -1,6 +1,6 @@
>  /* For SI->DI widening multiplication we should use DINS to combine the two
>     halves.  For Octeon use DMUL with explicit widening.  */
> -/* { dg-options "-O -mgp64 isa_rev>=2 forbid_cpu=octeon" } */
> +/* { dg-options "-O -mgp64 isa_rev>=2 forbid_cpu=octeon\[\+0-9\]*" } */
>  /* { dg-final { scan-assembler "\tdins\t" } } */
>  /* { dg-final { scan-assembler-not "\tdsll\t" } } */
>  /* { dg-final { scan-assembler-not "\tdsrl\t" } } */

Here I'd either prefer "forbid_cpu=octeon.*" (a bold statement that
no Octeon processor will ever be interested in these tests) or
"forbid_cpu=octeon(|+|2)" (a much more focused statement).
Just matching + and numbers is a bit in the middle: past experience
suggests that marketing departments don't always follow such logic.

If you don't have a strong preference, let's go for (|+|2).
If you do, go with what you think's best.

OK for 4.7 with those changes, thanks.

Richard
Andrew Pinski Dec. 9, 2011, 3:55 a.m. UTC | #2 
On Thu, Dec 8, 2011 at 12:43 PM, Richard Sandiford
<rdsandiford@googlemail.com> wrote:
> Andrew Pinski <andrew.pinski@caviumnetworks.com> writes:
>>> gcc/ChangeLog:
>>> * mips/mips-cpus.def (octeon+): New CPU.
>
> config/mips/mips-cpus.def
>
>>> testsuite/ChangeLog:
>>> * gcc.target/mips/mult-1.c: Forbit all Octeon processors.
>
> Forbid.
>
>> @@ -1,6 +1,6 @@
>>  /* For SI->DI widening multiplication we should use DINS to combine the two
>>     halves.  For Octeon use DMUL with explicit widening.  */
>> -/* { dg-options "-O -mgp64 isa_rev>=2 forbid_cpu=octeon" } */
>> +/* { dg-options "-O -mgp64 isa_rev>=2 forbid_cpu=octeon\[\+0-9\]*" } */
>>  /* { dg-final { scan-assembler "\tdins\t" } } */
>>  /* { dg-final { scan-assembler-not "\tdsll\t" } } */
>>  /* { dg-final { scan-assembler-not "\tdsrl\t" } } */
>
> Here I'd either prefer "forbid_cpu=octeon.*" (a bold statement that
> no Octeon processor will ever be interested in these tests) or
> "forbid_cpu=octeon(|+|2)" (a much more focused statement).
> Just matching + and numbers is a bit in the middle: past experience
> suggests that marketing departments don't always follow such logic.
>
> If you don't have a strong preference, let's go for (|+|2).
> If you do, go with what you think's best.
>
> OK for 4.7 with those changes, thanks.

I went with octeon.* because newer Octeon processor will never remove
bbit or dmul instructions.

Thanks,
Andrew Pinski
diff mbox

Patch

Index: testsuite/gcc.target/mips/mult-1.c
===================================================================
--- testsuite/gcc.target/mips/mult-1.c	(revision 182066)
+++ testsuite/gcc.target/mips/mult-1.c	(working copy)
@@ -1,6 +1,6 @@ 
 /* For SI->DI widening multiplication we should use DINS to combine the two
    halves.  For Octeon use DMUL with explicit widening.  */
-/* { dg-options "-O -mgp64 isa_rev>=2 forbid_cpu=octeon" } */
+/* { dg-options "-O -mgp64 isa_rev>=2 forbid_cpu=octeon\[\+0-9\]*" } */
 /* { dg-final { scan-assembler "\tdins\t" } } */
 /* { dg-final { scan-assembler-not "\tdsll\t" } } */
 /* { dg-final { scan-assembler-not "\tdsrl\t" } } */
Index: testsuite/gcc.target/mips/dmult-1.c
===================================================================
--- testsuite/gcc.target/mips/dmult-1.c	(revision 182066)
+++ testsuite/gcc.target/mips/dmult-1.c	(working copy)
@@ -1,4 +1,4 @@ 
-/* { dg-options "forbid_cpu=octeon -mgp64" } */
+/* { dg-options "forbid_cpu=octeon\[\+0-9\]* -mgp64" } */
 /* { dg-final { scan-assembler "\tdmult\t" } } */
 /* { dg-final { scan-assembler "\tmflo\t" } } */
 /* { dg-final { scan-assembler-not "\tdmul\t" } } */
Index: testsuite/gcc.target/mips/branch-1.c
===================================================================
--- testsuite/gcc.target/mips/branch-1.c	(revision 182066)
+++ testsuite/gcc.target/mips/branch-1.c	(working copy)
@@ -2,7 +2,7 @@ 
    but we test for "bbit" elsewhere.  On other targets, we should implement
    the "if" statements using an "andi" instruction followed by a branch
    on zero.  */
-/* { dg-options "-O2 forbid_cpu=octeon" } */
+/* { dg-options "-O2 forbid_cpu=octeon\[\+0-9\]*" } */
 
 void bar (void);
 NOMIPS16 void f1 (int x) { if (x & 4) bar (); }
Index: testsuite/gcc.target/mips/extend-1.c
===================================================================
--- testsuite/gcc.target/mips/extend-1.c	(revision 182066)
+++ testsuite/gcc.target/mips/extend-1.c	(working copy)
@@ -1,4 +1,4 @@ 
-/* { dg-options "-O -mgp64 forbid_cpu=octeon" } */
+/* { dg-options "-O -mgp64 forbid_cpu=octeon\[\+0-9\]*" } */
 /* { dg-final { scan-assembler-times "\tdsll\t" 5 } } */
 /* { dg-final { scan-assembler-times "\tdsra\t" 5 } } */
 /* { dg-final { scan-assembler-not "\tsll\t" } } */
Index: config/mips/mips-tables.opt
===================================================================
--- config/mips/mips-tables.opt	(revision 182066)
+++ config/mips/mips-tables.opt	(working copy)
@@ -603,3 +603,6 @@ 
 EnumValue
 Enum(mips_arch_opt_value) String(octeon) Value(80) Canonical
 
+EnumValue
+Enum(mips_arch_opt_value) String(octeon+) Value(81) Canonical
+
Index: config/mips/mips-cpus.def
===================================================================
--- config/mips/mips-cpus.def	(revision 182066)
+++ config/mips/mips-cpus.def	(working copy)
@@ -145,3 +145,4 @@ 
 
 /* MIPS64 Release 2 processors.  */
 MIPS_CPU ("octeon", PROCESSOR_OCTEON, 65, PTF_AVOID_BRANCHLIKELY)
+MIPS_CPU ("octeon+", PROCESSOR_OCTEON, 65, PTF_AVOID_BRANCHLIKELY)
Index: config/mips/mips.h
===================================================================
--- config/mips/mips.h	(revision 182066)
+++ config/mips/mips.h	(working copy)
@@ -329,7 +329,10 @@ 
 								\
       macro = concat ((PREFIX), "_", (INFO)->name, NULL);	\
       for (p = macro; *p != 0; p++)				\
-	*p = TOUPPER (*p);					\
+        if (*p == '+')                                          \
+          *p = 'P';                                             \
+        else                                                    \
+          *p = TOUPPER (*p);                                    \
 								\
       builtin_define (macro);					\
       builtin_define_with_value ((PREFIX), (INFO)->name, 1);	\