From patchwork Thu May 19 23:00:28 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 96493 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id BB9B6B719E for ; Fri, 20 May 2011 09:00:47 +1000 (EST) Received: (qmail 16563 invoked by alias); 19 May 2011 23:00:45 -0000 Received: (qmail 16555 invoked by uid 22791); 19 May 2011 23:00:44 -0000 X-SWARE-Spam-Status: No, hits=-2.3 required=5.0 tests=AWL, BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, FREEMAIL_FROM, RCVD_IN_DNSWL_LOW, RFC_ABUSE_POST, TW_ZJ X-Spam-Check-By: sourceware.org Received: from mail-qy0-f175.google.com (HELO mail-qy0-f175.google.com) (209.85.216.175) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Thu, 19 May 2011 23:00:29 +0000 Received: by qyk35 with SMTP id 35so3768239qyk.20 for ; Thu, 19 May 2011 16:00:28 -0700 (PDT) MIME-Version: 1.0 Received: by 10.229.105.71 with SMTP id s7mr2829972qco.23.1305846028149; Thu, 19 May 2011 16:00:28 -0700 (PDT) Received: by 10.229.239.132 with HTTP; Thu, 19 May 2011 16:00:28 -0700 (PDT) In-Reply-To: References: Date: Thu, 19 May 2011 16:00:28 -0700 Message-ID: Subject: Re: [PATCH, i386]: Fix __builtin_ia32_rdrand*_step expansion From: "H.J. Lu" To: Uros Bizjak Cc: gcc-patches@gcc.gnu.org X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org On Thu, May 19, 2011 at 12:32 PM, Uros Bizjak wrote: > Hello! > > Attached patch fixes ICE with -m32 -march=i386 -mrdrand on freebsd > [1]. The problem was that __builtin_ia32_rdrand*_step expands to a > sequence that includes conditional move, so we should set > TARGET_CMOVE. Additionally, the patch fixes expansion with void > return: > > void > foo (unsigned short *x) > { >  _rdrand16_step (x); > } > > And finally, move to the memory was moved closer to the producer, to > eventually generate few live registers. > > 2011-05-19  Uros Bizjak   > >        * config/i386/i386.c (option_override_internal): Enable TARGET_CMOVE >        when TARGET_RDRND is active. >        (ix86_expand_builtin) : Generate >        dummy SImode target register when target is NULL. > > Patch was bootstrapped and tested on x86_64-pc-linux-gnu, will be > committed to SVN mainline and 4.6. > I backported it to ix86/gcc-4_5-branch branch. Thanks. diff --git a/gcc/ChangeLog.ix86 b/gcc/ChangeLog.ix86 index 6d56dee..ba849e3 100644 --- a/gcc/ChangeLog.ix86 +++ b/gcc/ChangeLog.ix86 @@ -1,3 +1,13 @@ +2011-05-19 H.J. Lu + + Backport from mainline + 2011-05-19 Uros Bizjak + + * config/i386/i386.c (option_override_internal): Enable TARGET_CMOVE + when TARGET_RDRND is active. + (ix86_expand_builtin) : + Generate dummy SImode target register when target is NULL. + 2010-12-28 H.J. Lu Backport from mainline diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 13f2e11..9fccc8c 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -3471,8 +3471,9 @@ override_options (bool main_args_p) } /* For sane SSE instruction set generation we need fcomi instruction. - It is safe to enable all CMOVE instructions. */ - if (TARGET_SSE) + It is safe to enable all CMOVE instructions. Also, RDRAND intrinsic + expands to a sequence that includes conditional move. */ + if (TARGET_SSE || TARGET_RDRND) TARGET_CMOVE = 1; /* Figure out what ASM_GENERATE_INTERNAL_LABEL builds as a prefix. */ @@ -24540,6 +24541,12 @@ rdrand_step: op0 = gen_reg_rtx (mode0); emit_insn (GEN_FCN (icode) (op0)); + arg0 = CALL_EXPR_ARG (exp, 0); + op1 = expand_normal (arg0); + if (!address_operand (op1, VOIDmode)) + op1 = copy_addr_to_reg (op1); + emit_move_insn (gen_rtx_MEM (mode0, op1), op0); + op1 = gen_reg_rtx (SImode); emit_move_insn (op1, CONST1_RTX (SImode)); @@ -24554,17 +24561,13 @@ rdrand_step: else op2 = gen_rtx_SUBREG (SImode, op0, 0); + if (target == 0) + target = gen_reg_rtx (SImode); + pat = gen_rtx_GEU (VOIDmode, gen_rtx_REG (CCCmode, FLAGS_REG), const0_rtx); - emit_insn (gen_rtx_SET (VOIDmode, op1, + emit_insn (gen_rtx_SET (VOIDmode, target, gen_rtx_IF_THEN_ELSE (SImode, pat, op2, op1))); - emit_move_insn (target, op1); - - arg0 = CALL_EXPR_ARG (exp, 0); - op1 = expand_normal (arg0); - if (!address_operand (op1, VOIDmode)) - op1 = copy_addr_to_reg (op1); - emit_move_insn (gen_rtx_MEM (mode0, op1), op0); return target; default: