@@ -1,3 +1,13 @@
+2011-05-19 H.J. Lu <hongjiu.lu@intel.com>
+
+ Backport from mainline
+ 2011-05-19 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.c (option_override_internal): Enable TARGET_CMOVE
+ when TARGET_RDRND is active.
+ (ix86_expand_builtin) <case IX86_BUILTIN_RDRAND{16,32,64}_STEP>:
+ Generate dummy SImode target register when target is NULL.
+
2010-12-28 H.J. Lu <hongjiu.lu@intel.com>
Backport from mainline
@@ -3471,8 +3471,9 @@ override_options (bool main_args_p)
}
/* For sane SSE instruction set generation we need fcomi instruction.
- It is safe to enable all CMOVE instructions. */
- if (TARGET_SSE)
+ It is safe to enable all CMOVE instructions. Also, RDRAND intrinsic
+ expands to a sequence that includes conditional move. */
+ if (TARGET_SSE || TARGET_RDRND)
TARGET_CMOVE = 1;
/* Figure out what ASM_GENERATE_INTERNAL_LABEL builds as a prefix. */
@@ -24540,6 +24541,12 @@ rdrand_step:
op0 = gen_reg_rtx (mode0);
emit_insn (GEN_FCN (icode) (op0));
+ arg0 = CALL_EXPR_ARG (exp, 0);
+ op1 = expand_normal (arg0);
+ if (!address_operand (op1, VOIDmode))
+ op1 = copy_addr_to_reg (op1);
+ emit_move_insn (gen_rtx_MEM (mode0, op1), op0);
+
op1 = gen_reg_rtx (SImode);
emit_move_insn (op1, CONST1_RTX (SImode));
@@ -24554,17 +24561,13 @@ rdrand_step:
else
op2 = gen_rtx_SUBREG (SImode, op0, 0);
+ if (target == 0)
+ target = gen_reg_rtx (SImode);
+
pat = gen_rtx_GEU (VOIDmode, gen_rtx_REG (CCCmode, FLAGS_REG),
const0_rtx);
- emit_insn (gen_rtx_SET (VOIDmode, op1,
+ emit_insn (gen_rtx_SET (VOIDmode, target,
gen_rtx_IF_THEN_ELSE (SImode, pat, op2, op1)));
- emit_move_insn (target, op1);
-
- arg0 = CALL_EXPR_ARG (exp, 0);
- op1 = expand_normal (arg0);
- if (!address_operand (op1, VOIDmode))
- op1 = copy_addr_to_reg (op1);
- emit_move_insn (gen_rtx_MEM (mode0, op1), op0);
return target;
default: