From patchwork Tue Aug 23 08:15:04 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Suchanek X-Patchwork-Id: 661734 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3sJNY760MMz9sCp for ; Tue, 23 Aug 2016 18:15:37 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=OOEDEAu0; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:references:in-reply-to :content-type:content-transfer-encoding:mime-version; q=dns; s= default; b=HTs8TQ4Hfw+Z+G7zjg+4PvL1MWsKVdp50BIJk15uoZaDcKM2fplmb G6DalcKtos3SgZelDawoIH5k0czqwn0tWCv0vZQ7ER9Iy78cOEGesGIu1zXYPml9 kwCD012fgasJ5ouhyk8dBru8g6BdgVn+msaFLZbthPsLwKc8019NuE= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:references:in-reply-to :content-type:content-transfer-encoding:mime-version; s=default; bh=SzjBGnUyFV+SqUHbSLfQqzyApNw=; b=OOEDEAu0sKtmR/j8eovqWTaD0Ce4 z91vbpSmiRZCqPB3IHqpZIfkmGzRzM2B/LpyiarMuCmvYclh/u/5yQ96O1XYZAxH wsdBmGBwq3K9bzOUyYpk0twI/jGEpX5a+BfNp86bhYRITNGhCOzL14Vw4VwBjCvt imlTLNnCzINUsws= Received: (qmail 102491 invoked by alias); 23 Aug 2016 08:15:27 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 102450 invoked by uid 89); 23 Aug 2016 08:15:20 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.2 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_NONE, RP_MATCHES_RCVD, SPF_PASS autolearn=ham version=3.3.2 spammy=cache, mixing, disappear, HAccept-Language:en-GB X-HELO: mailapp01.imgtec.com Received: from mailapp01.imgtec.com (HELO mailapp01.imgtec.com) (195.59.15.196) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 23 Aug 2016 08:15:19 +0000 Received: from hhmail02.hh.imgtec.org (unknown [10.100.10.20]) by Forcepoint Email with ESMTPS id 891C1F42562C4; Tue, 23 Aug 2016 09:15:02 +0100 (IST) Received: from HHMAIL01.hh.imgtec.org ([fe80::710b:f219:72bc:e0b3]) by hhmail02.hh.imgtec.org ([fe80::5400:d33e:81a4:f775%25]) with mapi id 14.03.0294.000; Tue, 23 Aug 2016 09:15:04 +0100 From: Robert Suchanek To: Trevor Saunders CC: Mike Stump , "Catherine_Moore@mentor.com" , Matthew Fortune , "gcc-patches@gcc.gnu.org" Subject: RE: [PATCH 3/4] Add support to run auto-vectorization tests for multiple effective targets Date: Tue, 23 Aug 2016 08:15:04 +0000 Message-ID: References: <20160815104607.g32kqqnzptdvf6dr@ball> In-Reply-To: <20160815104607.g32kqqnzptdvf6dr@ball> MIME-Version: 1.0 X-IsSubscribed: yes Hi, > unfortunately this broke make check-c > RUNTESTFLAGS='vect.exp=*no-vfa-vect-dv-2.c > --target_board=unix\{-m32,-m64\}', causing the check if > vect_aligned_arrays to be cached between the -m64 and -m32 variants > which is incorrect at least on my machine if you actually run that test > for -m32 and -m64 you get different results. In both case et_index is 0 > so you use the cached value the second time, but that's not correct > because the options changed. > > I suspect this also causes some random vectorizer tests to appear and > disappear during regression testing with the same -m64 and -m32, but I'm > not absolutely sure of that part. > > Thanks! > > Trev I was misled by the comments in a few procedures suggesting that the results should have been cached and the use of global variable looked mistyped. The following patch reverts to the old behaviour. I also removed misleading comments and related logic that checks for the cached result. There might be other procedures with similar inconsistency but here I only modified the offending ones. Alternatively, it would be possible to switch to the new method and do the caching but it is more intrusive change that requires careful analysis of the results and the tests will not likely be directly comparable with old results (because of flag mixing into the test names). It's safer to restore the original behaviour as the patch was not supposed to change any existing results. Ok to apply? Regards, Robert gcc/testsuite/ * lib/target-supports.exp (check_effective_target_vect_aligned_arrays): Don't cache the result. (check_effective_target_vect_natural_alignment): Ditto. (check_effective_target_vector_alignment_reachable): Ditto. (check_effective_target_vector_alignment_reachable_for_64bit): Ditto. diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index 533d3a6..0dabea0 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -5309,32 +5309,22 @@ proc check_effective_target_vect_hw_misalign { } { # Return 1 if arrays are aligned to the vector alignment # boundary, 0 otherwise. -# -# This won't change for different subtargets so cache the result. proc check_effective_target_vect_aligned_arrays { } { - global et_vect_aligned_arrays_saved - global et_index - - if [info exists et_vect_aligned_arrays_saved($et_index)] { - verbose "check_effective_target_vect_aligned_arrays:\ - using cached result" 2 - } else { - set et_vect_aligned_arrays_saved($et_index) 0 - if { ([istarget x86_64-*-*] || [istarget i?86-*-*]) } { - if { ([is-effective-target lp64] - && ( ![check_avx_available] - || [check_prefer_avx128])) } { - set et_vect_aligned_arrays_saved($et_index) 1 - } - } - if [istarget spu-*-*] { - set et_vect_aligned_arrays_saved($et_index) 1 + set et_vect_aligned_arrays 0 + if { ([istarget x86_64-*-*] || [istarget i?86-*-*]) } { + if { ([is-effective-target lp64] + && ( ![check_avx_available] + || [check_prefer_avx128])) } { + set et_vect_aligned_arrays 1 } } + if [istarget spu-*-*] { + set et_vect_aligned_arrays 1 + } verbose "check_effective_target_vect_aligned_arrays:\ - returning $et_vect_aligned_arrays_saved($et_index)" 2 - return $et_vect_aligned_arrays_saved($et_index) + returning $et_vect_aligned_arrays" 2 + return $et_vect_aligned_arrays } # Return 1 if types of size 32 bit or less are naturally aligned @@ -5382,74 +5372,43 @@ proc check_effective_target_natural_alignment_64 { } { # Return 1 if all vector types are naturally aligned (aligned to their # type-size), 0 otherwise. -# -# This won't change for different subtargets so cache the result. proc check_effective_target_vect_natural_alignment { } { - global et_vect_natural_alignment_saved - global et_index - - if [info exists et_vect_natural_alignment_saved($et_index)] { - verbose "check_effective_target_vect_natural_alignment: using cached result" 2 - } else { - set et_vect_natural_alignment_saved($et_index) 1 - if { [check_effective_target_arm_eabi] - || [istarget nvptx-*-*] - || [istarget s390*-*-*] } { - set et_vect_natural_alignment_saved($et_index) 0 - } + set et_vect_natural_alignment 1 + if { [check_effective_target_arm_eabi] + || [istarget nvptx-*-*] + || [istarget s390*-*-*] } { + set et_vect_natural_alignment 0 } verbose "check_effective_target_vect_natural_alignment:\ - returning $et_vect_natural_alignment_saved($et_index)" 2 - return $et_vect_natural_alignment_saved($et_index) + returning $et_vect_natural_alignment" 2 + return $et_vect_natural_alignment } # Return 1 if vector alignment (for types of size 32 bit or less) is reachable, 0 otherwise. -# -# This won't change for different subtargets so cache the result. proc check_effective_target_vector_alignment_reachable { } { - global et_vector_alignment_reachable_saved - global et_index - - if [info exists et_vector_alignment_reachable_saved($et_index)] { - verbose "check_effective_target_vector_alignment_reachable:\ - using cached result" 2 - } else { - if { [check_effective_target_vect_aligned_arrays] - || [check_effective_target_natural_alignment_32] } { - set et_vector_alignment_reachable_saved($et_index) 1 - } else { - set et_vector_alignment_reachable_saved($et_index) 0 - } + set et_vector_alignment_reachable 0 + if { [check_effective_target_vect_aligned_arrays] + || [check_effective_target_natural_alignment_32] } { + set et_vector_alignment_reachable 1 } verbose "check_effective_target_vector_alignment_reachable:\ - returning $et_vector_alignment_reachable_saved($et_index)" 2 - return $et_vector_alignment_reachable_saved($et_index) + returning $et_vector_alignment_reachable" 2 + return $et_vector_alignment_reachable } # Return 1 if vector alignment for 64 bit is reachable, 0 otherwise. -# -# This won't change for different subtargets so cache the result. proc check_effective_target_vector_alignment_reachable_for_64bit { } { - global et_vector_alignment_reachable_for_64bit_saved - global et_index - - if [info exists et_vector_alignment_reachable_for_64bit_saved($et_index)] { - verbose "check_effective_target_vector_alignment_reachable_for_64bit:\ - using cached result" 2 - } else { - if { [check_effective_target_vect_aligned_arrays] - || [check_effective_target_natural_alignment_64] } { - set et_vector_alignment_reachable_for_64bit_saved($et_index) 1 - } else { - set et_vector_alignment_reachable_for_64bit_saved($et_index) 0 - } + set et_vector_alignment_reachable_for_64bit 0 + if { [check_effective_target_vect_aligned_arrays] + || [check_effective_target_natural_alignment_64] } { + set et_vector_alignment_reachable_for_64bit 1 } verbose "check_effective_target_vector_alignment_reachable_for_64bit:\ - returning $et_vector_alignment_reachable_for_64bit_saved($et_index)" 2 - return $et_vector_alignment_reachable_for_64bit_saved($et_index) + returning $et_vector_alignment_reachable_for_64bit" 2 + return $et_vector_alignment_reachable_for_64bit } # Return 1 if the target only requires element alignment for vector accesses