From patchwork Wed Aug 5 08:31:08 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Suchanek X-Patchwork-Id: 503929 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 8C0DE1402AA for ; Wed, 5 Aug 2015 18:31:21 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=Zs/p4hgs; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:date:message-id:content-type :content-transfer-encoding:mime-version; q=dns; s=default; b=fCd W3Xsr06rpzP0uUlCo7lFvdLDPNSBMKrJKc3Znqy9RX1+5Bv2DiutUvRvRiQbieCH bzUi57J6T7RvpCIommtg8L1zl+Mfr0CijApIdXoSdXQcsMM3dM0cYRdvuZ12Wgnv wiIjHnyRxveyCB7AQwQQpUz90TfyJxLl8Xrm5eU0= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:date:message-id:content-type :content-transfer-encoding:mime-version; s=default; bh=oQoLYcp0G 6ygQl1n91hZbEaIKvQ=; b=Zs/p4hgsiMCLOW9oa7nKn+/5H7m9NfJ/iWw2dxqyZ CF+7WXKudgI7CY3u/b673FtR2H1JEWx3MY83MPilf9pKYF2As5GmZzb9/YvLSOfQ EJr7W4NFKLJwsi8iDPt79XvUOzwdCNBMhjF9QSU4F+sgApNN6XcDgXnZvTwKNN2J 2c= Received: (qmail 8454 invoked by alias); 5 Aug 2015 08:31:14 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 8443 invoked by uid 89); 5 Aug 2015 08:31:14 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.2 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_LOW, RP_MATCHES_RCVD, SPF_PASS autolearn=ham version=3.3.2 X-HELO: mailapp01.imgtec.com Received: from mailapp01.imgtec.com (HELO mailapp01.imgtec.com) (195.59.15.196) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 05 Aug 2015 08:31:13 +0000 Received: from KLMAIL01.kl.imgtec.org (unknown [192.168.5.35]) by Websense Email Security Gateway with ESMTPS id AD0C19B2D9A1E; Wed, 5 Aug 2015 09:31:08 +0100 (IST) Received: from hhmail02.hh.imgtec.org (10.100.10.20) by KLMAIL01.kl.imgtec.org (192.168.5.35) with Microsoft SMTP Server (TLS) id 14.3.195.1; Wed, 5 Aug 2015 09:31:10 +0100 Received: from hhmail02.hh.imgtec.org ([::1]) by hhmail02.hh.imgtec.org ([::1]) with mapi id 14.03.0235.001; Wed, 5 Aug 2015 09:31:09 +0100 From: Robert Suchanek To: "Catherine_Moore@mentor.com" , Matthew Fortune , "gcc-patches@gcc.gnu.org" Subject: [PATCH, MIPS] Remove W32 and W64 pseudo-processors Date: Wed, 5 Aug 2015 08:31:08 +0000 Message-ID: MIME-Version: 1.0 X-IsSubscribed: yes Hi, Since the I6400 scheduler is committed, W32/W64 pseudo-processors are not needed anymore and can be removed. Ok to commit? Regards, Robert gcc/ * config/mips/mips.c (mips_rtx_cost_data): Remove costs for W32 and W64 pseudo-processors. * config/mips/mips.md (processor): Remove w32 and w64. --- gcc/config/mips/mips.c | 26 -------------------------- gcc/config/mips/mips.md | 2 -- 2 files changed, 28 deletions(-) diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index bf0f84f..b30d7b9 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -1255,32 +1255,6 @@ static const struct mips_rtx_cost_data 2, /* branch_cost */ 4 /* memory_latency */ }, - { /* W32 */ - COSTS_N_INSNS (4), /* fp_add */ - COSTS_N_INSNS (4), /* fp_mult_sf */ - COSTS_N_INSNS (5), /* fp_mult_df */ - COSTS_N_INSNS (17), /* fp_div_sf */ - COSTS_N_INSNS (32), /* fp_div_df */ - COSTS_N_INSNS (5), /* int_mult_si */ - COSTS_N_INSNS (5), /* int_mult_di */ - COSTS_N_INSNS (41), /* int_div_si */ - COSTS_N_INSNS (41), /* int_div_di */ - 1, /* branch_cost */ - 4 /* memory_latency */ - }, - { /* W64 */ - COSTS_N_INSNS (4), /* fp_add */ - COSTS_N_INSNS (4), /* fp_mult_sf */ - COSTS_N_INSNS (5), /* fp_mult_df */ - COSTS_N_INSNS (17), /* fp_div_sf */ - COSTS_N_INSNS (32), /* fp_div_df */ - COSTS_N_INSNS (5), /* int_mult_si */ - COSTS_N_INSNS (5), /* int_mult_di */ - COSTS_N_INSNS (41), /* int_div_si */ - COSTS_N_INSNS (41), /* int_div_di */ - 1, /* branch_cost */ - 4 /* memory_latency */ - }, { /* M5100 */ COSTS_N_INSNS (4), /* fp_add */ COSTS_N_INSNS (4), /* fp_mult_sf */ diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index 2954a12..a0079d5 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -67,8 +67,6 @@ (define_enum "processor" [ xlr xlp p5600 - w32 - w64 m5100 i6400 ])