From patchwork Thu Jul 16 14:17:10 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Suchanek X-Patchwork-Id: 496709 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 860351402A0 for ; Fri, 17 Jul 2015 00:17:26 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=xURmKPhr; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:content-type :content-transfer-encoding:mime-version; q=dns; s=default; b=xv2 pVTLK1Q13qHlxRpky23O1dldcivueaz+48vTe8beHTQN9LxZzMccDjh3c2m/EM2K t2Zxj/MZDvM+pPQSp2Q6dXbfJk5mdMBYEjkgckgrJxlAs/N1OgNPuuoEq7+Rvhu1 Ac6D+dCzweyvhF70ow8OaLyGPUwsjOww8M8pbKPI= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:content-type :content-transfer-encoding:mime-version; s=default; bh=ifvT5IDEZ HcoJaxsgiqXvOucviU=; b=xURmKPhrkePWOHcFxmyVE4BByh+PSegLNbhZ9jH/V 2v9dF4erAZxEIgffzjyfcCi24AC5APuzysbOo2DmbKpXsgGAi9ZOrcEu2o5hkjfL 08w/NiOEa5BTdu8KQ1ylXlJzvd0KcKoIl4pY0ouaPPevxRNPpjG30vaY5A+HHLRR UA= Received: (qmail 89188 invoked by alias); 16 Jul 2015 14:17:18 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 87551 invoked by uid 89); 16 Jul 2015 14:17:17 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.5 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_LOW, RP_MATCHES_RCVD, SPF_PASS autolearn=ham version=3.3.2 X-HELO: mailapp01.imgtec.com Received: from mailapp01.imgtec.com (HELO mailapp01.imgtec.com) (195.59.15.196) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 16 Jul 2015 14:17:14 +0000 Received: from KLMAIL01.kl.imgtec.org (unknown [192.168.5.35]) by Websense Email Security Gateway with ESMTPS id 0C0A6610C0571; Thu, 16 Jul 2015 15:17:09 +0100 (IST) Received: from hhmail02.hh.imgtec.org (10.100.10.20) by KLMAIL01.kl.imgtec.org (192.168.5.35) with Microsoft SMTP Server (TLS) id 14.3.195.1; Thu, 16 Jul 2015 15:17:11 +0100 Received: from hhmail02.hh.imgtec.org ([::1]) by hhmail02.hh.imgtec.org ([::1]) with mapi id 14.03.0235.001; Thu, 16 Jul 2015 15:17:11 +0100 From: Robert Suchanek To: "Catherine_Moore@mentor.com" , Matthew Fortune CC: "gcc-patches@gcc.gnu.org" Subject: [PATCH, MIPS] Add -march=interaptiv Date: Thu, 16 Jul 2015 14:17:10 +0000 Message-ID: MIME-Version: 1.0 X-IsSubscribed: yes Hi, As in the title, the attached patch adds -march=interaptiv defined to 24kf2_1, mapped to -mips32r2 and -mdsp. OK to apply? Regards, Robert gcc/ * config/mips/mips-cpus.def (interaptiv): Define. * config/mips/mips-tables.opt: Regenerate. * config/mips/mips.h (MIPS_ISA_LEVEL_SPEC): Map -march=interaptiv to -mips32r2. (BASE_DRIVER_SELF_SPECS): Likewise but map to -mdsp. * doc/invoke.texi (-march=@var{arch}): Add interaptiv. --- gcc/config/mips/mips-cpus.def | 2 ++ gcc/config/mips/mips-tables.opt | 39 +++++++++++++++++++++------------------ gcc/config/mips/mips.h | 6 ++++-- gcc/doc/invoke.texi | 1 + 4 files changed, 28 insertions(+), 20 deletions(-) diff --git a/gcc/config/mips/mips-cpus.def b/gcc/config/mips/mips-cpus.def index fb4bae0..63a0d6e 100644 --- a/gcc/config/mips/mips-cpus.def +++ b/gcc/config/mips/mips-cpus.def @@ -147,6 +147,8 @@ MIPS_CPU ("1004kf2_1", PROCESSOR_24KF2_1, 33, 0) MIPS_CPU ("1004kf", PROCESSOR_24KF2_1, 33, 0) MIPS_CPU ("1004kf1_1", PROCESSOR_24KF1_1, 33, 0) +MIPS_CPU ("interaptiv", PROCESSOR_24KF2_1, 33, 0) + /* MIPS32 Release 5 processors. */ MIPS_CPU ("p5600", PROCESSOR_P5600, 36, PTF_AVOID_BRANCHLIKELY) diff --git a/gcc/config/mips/mips-tables.opt b/gcc/config/mips/mips-tables.opt index 59124a6..8c6c4b1 100644 --- a/gcc/config/mips/mips-tables.opt +++ b/gcc/config/mips/mips-tables.opt @@ -631,56 +631,59 @@ EnumValue Enum(mips_arch_opt_value) String(r1004kf1_1) Value(84) EnumValue -Enum(mips_arch_opt_value) String(p5600) Value(85) Canonical +Enum(mips_arch_opt_value) String(interaptiv) Value(85) Canonical EnumValue -Enum(mips_arch_opt_value) String(5kc) Value(86) Canonical +Enum(mips_arch_opt_value) String(p5600) Value(86) Canonical EnumValue -Enum(mips_arch_opt_value) String(r5kc) Value(86) +Enum(mips_arch_opt_value) String(5kc) Value(87) Canonical EnumValue -Enum(mips_arch_opt_value) String(5kf) Value(87) Canonical +Enum(mips_arch_opt_value) String(r5kc) Value(87) EnumValue -Enum(mips_arch_opt_value) String(r5kf) Value(87) +Enum(mips_arch_opt_value) String(5kf) Value(88) Canonical EnumValue -Enum(mips_arch_opt_value) String(20kc) Value(88) Canonical +Enum(mips_arch_opt_value) String(r5kf) Value(88) EnumValue -Enum(mips_arch_opt_value) String(r20kc) Value(88) +Enum(mips_arch_opt_value) String(20kc) Value(89) Canonical EnumValue -Enum(mips_arch_opt_value) String(sb1) Value(89) Canonical +Enum(mips_arch_opt_value) String(r20kc) Value(89) EnumValue -Enum(mips_arch_opt_value) String(sb1a) Value(90) Canonical +Enum(mips_arch_opt_value) String(sb1) Value(90) Canonical EnumValue -Enum(mips_arch_opt_value) String(sr71000) Value(91) Canonical +Enum(mips_arch_opt_value) String(sb1a) Value(91) Canonical EnumValue -Enum(mips_arch_opt_value) String(sr71k) Value(91) +Enum(mips_arch_opt_value) String(sr71000) Value(92) Canonical EnumValue -Enum(mips_arch_opt_value) String(xlr) Value(92) Canonical +Enum(mips_arch_opt_value) String(sr71k) Value(92) EnumValue -Enum(mips_arch_opt_value) String(loongson3a) Value(93) Canonical +Enum(mips_arch_opt_value) String(xlr) Value(93) Canonical EnumValue -Enum(mips_arch_opt_value) String(octeon) Value(94) Canonical +Enum(mips_arch_opt_value) String(loongson3a) Value(94) Canonical EnumValue -Enum(mips_arch_opt_value) String(octeon+) Value(95) Canonical +Enum(mips_arch_opt_value) String(octeon) Value(95) Canonical EnumValue -Enum(mips_arch_opt_value) String(octeon2) Value(96) Canonical +Enum(mips_arch_opt_value) String(octeon+) Value(96) Canonical EnumValue -Enum(mips_arch_opt_value) String(octeon3) Value(97) Canonical +Enum(mips_arch_opt_value) String(octeon2) Value(97) Canonical EnumValue -Enum(mips_arch_opt_value) String(xlp) Value(98) Canonical +Enum(mips_arch_opt_value) String(octeon3) Value(98) Canonical + +EnumValue +Enum(mips_arch_opt_value) String(xlp) Value(99) Canonical diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index 37f5b54..505e111 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -722,7 +722,8 @@ struct mips_cpu_info { |march=r10000|march=r12000|march=r14000|march=r16000:-mips4} \ %{march=mips32|march=4kc|march=4km|march=4kp|march=4ksc:-mips32} \ %{march=mips32r2|march=m4k|march=4ke*|march=4ksd|march=24k* \ - |march=34k*|march=74k*|march=m14k*|march=1004k*: -mips32r2} \ + |march=34k*|march=74k*|march=m14k*|march=1004k* \ + |march=interaptiv: -mips32r2} \ %{march=mips32r3: -mips32r3} \ %{march=mips32r5|march=p5600: -mips32r5} \ %{march=mips32r6: -mips32r6} \ @@ -825,7 +826,8 @@ struct mips_cpu_info { #define BASE_DRIVER_SELF_SPECS \ MIPS_ISA_NAN2008_SPEC, \ "%{!mno-dsp: \ - %{march=24ke*|march=34kc*|march=34kf*|march=34kx*|march=1004k*: -mdsp} \ + %{march=24ke*|march=34kc*|march=34kf*|march=34kx*|march=1004k* \ + |march=interaptiv: -mdsp} \ %{march=74k*|march=m14ke*: %{!mno-dspr2: -mdspr2 -mdsp}}}" #define DRIVER_SELF_SPECS \ diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 522e924..0cc83ae 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -17053,6 +17053,7 @@ The processor names are: @samp{34kc}, @samp{34kf2_1}, @samp{34kf1_1}, @samp{34kn}, @samp{74kc}, @samp{74kf2_1}, @samp{74kf1_1}, @samp{74kf3_2}, @samp{1004kc}, @samp{1004kf2_1}, @samp{1004kf1_1}, +@samp{interaptiv}, @samp{loongson2e}, @samp{loongson2f}, @samp{loongson3a}, @samp{m4k}, @samp{m14k}, @samp{m14kc}, @samp{m14ke}, @samp{m14kec},