| Message ID | AM5PR0802MB2610E140EE4275D2BAC18D0C83030@AM5PR0802MB2610.eurprd08.prod.outlook.com |
|---|---|
| State | New |
| Headers | show |
On 12/04/17 13:50, Wilco Dijkstra wrote: > Set jump alignment to 4 for Cortex cores as it reduces codesize by 0.4% on average > with no obvious performance difference. See original discussion of the overheads > of various alignments: https://gcc.gnu.org/ml/gcc-patches/2016-06/msg02075.html > > Bootstrap OK, OK for stage 1? > > ChangeLog: > 2017-04-12 Wilco Dijkstra <wdijkstr@arm.com> > > * config/aarch64/aarch64.c (cortexa35_tunings): Set jump alignment to 4. > (cortexa53_tunings): Likewise. > (cortexa57_tunings): Likewise. > (cortexa72_tunings): Likewise. > (cortexa73_tunings): Likewise. > OK. R. > -- > diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c > index a6004e6e283ba7157e65b678cf668f8a47e21abb..a8b3a29dd2e242a35f37b8c6a6fb30699ace5e01 100644 > --- a/gcc/config/aarch64/aarch64.c > +++ b/gcc/config/aarch64/aarch64.c > @@ -564,7 +564,7 @@ static const struct tune_params cortexa35_tunings = > (AARCH64_FUSE_AES_AESMC | AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_ADRP_ADD > | AARCH64_FUSE_MOVK_MOVK | AARCH64_FUSE_ADRP_LDR), /* fusible_ops */ > 16, /* function_align. */ > - 8, /* jump_align. */ > + 4, /* jump_align. */ > 8, /* loop_align. */ > 2, /* int_reassoc_width. */ > 4, /* fp_reassoc_width. */ > @@ -590,7 +590,7 @@ static const struct tune_params cortexa53_tunings = > (AARCH64_FUSE_AES_AESMC | AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_ADRP_ADD > | AARCH64_FUSE_MOVK_MOVK | AARCH64_FUSE_ADRP_LDR), /* fusible_ops */ > 16, /* function_align. */ > - 8, /* jump_align. */ > + 4, /* jump_align. */ > 8, /* loop_align. */ > 2, /* int_reassoc_width. */ > 4, /* fp_reassoc_width. */ > @@ -616,7 +616,7 @@ static const struct tune_params cortexa57_tunings = > (AARCH64_FUSE_AES_AESMC | AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_ADRP_ADD > | AARCH64_FUSE_MOVK_MOVK), /* fusible_ops */ > 16, /* function_align. */ > - 8, /* jump_align. */ > + 4, /* jump_align. */ > 8, /* loop_align. */ > 2, /* int_reassoc_width. */ > 4, /* fp_reassoc_width. */ > @@ -642,7 +642,7 @@ static const struct tune_params cortexa72_tunings = > (AARCH64_FUSE_AES_AESMC | AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_ADRP_ADD > | AARCH64_FUSE_MOVK_MOVK), /* fusible_ops */ > 16, /* function_align. */ > - 8, /* jump_align. */ > + 4, /* jump_align. */ > 8, /* loop_align. */ > 2, /* int_reassoc_width. */ > 4, /* fp_reassoc_width. */ > @@ -668,7 +668,7 @@ static const struct tune_params cortexa73_tunings = > (AARCH64_FUSE_AES_AESMC | AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_ADRP_ADD > | AARCH64_FUSE_MOVK_MOVK | AARCH64_FUSE_ADRP_LDR), /* fusible_ops */ > 16, /* function_align. */ > - 8, /* jump_align. */ > + 4, /* jump_align. */ > 8, /* loop_align. */ > 2, /* int_reassoc_width. */ > 4, /* fp_reassoc_width. */ >
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index a6004e6e283ba7157e65b678cf668f8a47e21abb..a8b3a29dd2e242a35f37b8c6a6fb30699ace5e01 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -564,7 +564,7 @@ static const struct tune_params cortexa35_tunings = (AARCH64_FUSE_AES_AESMC | AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_ADRP_ADD | AARCH64_FUSE_MOVK_MOVK | AARCH64_FUSE_ADRP_LDR), /* fusible_ops */ 16, /* function_align. */ - 8, /* jump_align. */ + 4, /* jump_align. */ 8, /* loop_align. */ 2, /* int_reassoc_width. */ 4, /* fp_reassoc_width. */ @@ -590,7 +590,7 @@ static const struct tune_params cortexa53_tunings = (AARCH64_FUSE_AES_AESMC | AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_ADRP_ADD | AARCH64_FUSE_MOVK_MOVK | AARCH64_FUSE_ADRP_LDR), /* fusible_ops */ 16, /* function_align. */ - 8, /* jump_align. */ + 4, /* jump_align. */ 8, /* loop_align. */ 2, /* int_reassoc_width. */ 4, /* fp_reassoc_width. */ @@ -616,7 +616,7 @@ static const struct tune_params cortexa57_tunings = (AARCH64_FUSE_AES_AESMC | AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_ADRP_ADD | AARCH64_FUSE_MOVK_MOVK), /* fusible_ops */ 16, /* function_align. */ - 8, /* jump_align. */ + 4, /* jump_align. */ 8, /* loop_align. */ 2, /* int_reassoc_width. */ 4, /* fp_reassoc_width. */ @@ -642,7 +642,7 @@ static const struct tune_params cortexa72_tunings = (AARCH64_FUSE_AES_AESMC | AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_ADRP_ADD | AARCH64_FUSE_MOVK_MOVK), /* fusible_ops */ 16, /* function_align. */ - 8, /* jump_align. */ + 4, /* jump_align. */ 8, /* loop_align. */ 2, /* int_reassoc_width. */ 4, /* fp_reassoc_width. */ @@ -668,7 +668,7 @@ static const struct tune_params cortexa73_tunings = (AARCH64_FUSE_AES_AESMC | AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_ADRP_ADD | AARCH64_FUSE_MOVK_MOVK | AARCH64_FUSE_ADRP_LDR), /* fusible_ops */ 16, /* function_align. */ - 8, /* jump_align. */ + 4, /* jump_align. */ 8, /* loop_align. */ 2, /* int_reassoc_width. */ 4, /* fp_reassoc_width. */
Set jump alignment to 4 for Cortex cores as it reduces codesize by 0.4% on average with no obvious performance difference. See original discussion of the overheads of various alignments: https://gcc.gnu.org/ml/gcc-patches/2016-06/msg02075.html Bootstrap OK, OK for stage 1? ChangeLog: 2017-04-12 Wilco Dijkstra <wdijkstr@arm.com> * config/aarch64/aarch64.c (cortexa35_tunings): Set jump alignment to 4. (cortexa53_tunings): Likewise. (cortexa57_tunings): Likewise. (cortexa72_tunings): Likewise. (cortexa73_tunings): Likewise. --