| Message ID | AM3PR08MB0088B6F8494B5B5839208F15832B0@AM3PR08MB0088.eurprd08.prod.outlook.com |
|---|---|
| State | New |
| Headers | show |
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrnd.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrnd.c index 5f492d41bffb49fd6811a31aacb86d8a949ab0e6..d97a3a25ee5fb0a6021f0d75c4d653bff0d59bb7 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrnd.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrnd.c @@ -1,4 +1,4 @@ -/* { dg-require-effective-target arm_v8_neon_ok } */ +/* { dg-require-effective-target arm_v8_neon_hw } */ /* { dg-add-options arm_v8_neon } */ #include <arm_neon.h> diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrnda.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrnda.c index 816fd28dd19d6f0591619c3fa3ca06b7e4d99c3e..ff2bdc0563fc3a15115ae6121408f134bb9e81cd 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrnda.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrnda.c @@ -1,4 +1,4 @@ -/* { dg-require-effective-target arm_v8_neon_ok } */ +/* { dg-require-effective-target arm_v8_neon_hw } */ /* { dg-add-options arm_v8_neon } */ #include <arm_neon.h> diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndm.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndm.c index 029880c21f6fdea148ec6a41a7a438cd08eeafe3..eae9f61c5859b7f7add3dd01ff0edfd0ae8cd75b 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndm.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndm.c @@ -1,4 +1,4 @@ -/* { dg-require-effective-target arm_v8_neon_ok } */ +/* { dg-require-effective-target arm_v8_neon_hw } */ /* { dg-add-options arm_v8_neon } */ #include <arm_neon.h> diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndn.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndn.c index 571243c49298ec154c55932b611eb3bcc42efe60..c6c707d67655cc648e0526a489046411a065675f 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndn.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndn.c @@ -1,4 +1,4 @@ -/* { dg-require-effective-target arm_v8_neon_ok } */ +/* { dg-require-effective-target arm_v8_neon_hw } */ /* { dg-add-options arm_v8_neon } */ #include <arm_neon.h> diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndp.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndp.c index ff4771c87892d202732e9eefa9b241c1dec1c9eb..e94eb6b76221c7b229229e1286eb910b7eef740f 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndp.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndp.c @@ -1,4 +1,4 @@ -/* { dg-require-effective-target arm_v8_neon_ok } */ +/* { dg-require-effective-target arm_v8_neon_hw } */ /* { dg-add-options arm_v8_neon } */ #include <arm_neon.h> diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndx.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndx.c index ff2357bebf3c01d723229c43d35a747d2bbe1315..0d2a63ef26c75f684ed17689a37d1b8ada0b043f 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndx.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndx.c @@ -1,4 +1,4 @@ -/* { dg-require-effective-target arm_v8_neon_ok } */ +/* { dg-require-effective-target arm_v8_neon_hw } */ /* { dg-add-options arm_v8_neon } */ #include <arm_neon.h> diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index 9876bb5f4ce539628c451f77e21415507830c4f6..2a8feb8f13e0130036771a73a40015c905c21993 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -3417,11 +3417,17 @@ proc check_effective_target_arm_v8_neon_hw { } { int main (void) { - float32x2_t a; + float32x2_t a = { 1.0f, 2.0f }; + #ifdef __ARM_ARCH_ISA_A64 + asm ("frinta %0.2s, %1.2s" + : "=w" (a) + : "w" (a)); + #else asm ("vrinta.f32 %P0, %P1" : "=w" (a) : "0" (a)); - return 0; + #endif + return a[0] == 2.0f; } } [add_options_for_arm_v8_neon ""]] }
The recently added gcc.target/aarch64/advsimd-intrinsics/vrnd*.c tests cause failures due to accidentally running on non-ARMv8 hardware - the target check arm_v8_neon_ok is correct for compilation tests but should be arm_v8_neon_hw for execution tests. Fix this and also change arm_v8_neon_hw to return true for AArch64 so these tests are run on AArch64 too. Committed as trivial patch in r237653. ChangeLog: 2016-06-21 Wilco Dijkstra <wdijkstr@arm.com> gcc/testsuite/ * gcc.target/aarch64/advsimd-intrinsics/vrnd.c (dg-require-effective-target): Use arm_v8_neon_hw. * gcc.target/aarch64/advsimd-intrinsics/vrnda.c (dg-require-effective-target): Likewise. * gcc.target/aarch64/advsimd-intrinsics/vrndm.c (dg-require-effective-target): Likewise. * gcc.target/aarch64/advsimd-intrinsics/vrndn.c (dg-require-effective-target): Likewise. * gcc.target/aarch64/advsimd-intrinsics/vrndp.c (dg-require-effective-target): Likewise. * gcc.target/aarch64/advsimd-intrinsics/vrndx.c (dg-require-effective-target): Likewise. * lib/target-supports.exp (check_runtime arm_v8_neon_hw_available): Add AArch64 check. --