From patchwork Wed Aug 4 18:39:00 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Martin Thuresson X-Patchwork-Id: 60881 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id C1896B70A5 for ; Thu, 5 Aug 2010 04:39:33 +1000 (EST) Received: (qmail 1149 invoked by alias); 4 Aug 2010 18:39:32 -0000 Received: (qmail 1132 invoked by uid 22791); 4 Aug 2010 18:39:31 -0000 X-SWARE-Spam-Status: No, hits=-0.6 required=5.0 tests=AWL, BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, SARE_BAYES_5x7, SARE_BAYES_6x7, SARE_BAYES_7x7, SPF_HELO_PASS, T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from smtp-out.google.com (HELO smtp-out.google.com) (74.125.121.35) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Wed, 04 Aug 2010 18:39:26 +0000 Received: from wpaz21.hot.corp.google.com (wpaz21.hot.corp.google.com [172.24.198.85]) by smtp-out.google.com with ESMTP id o74IdNmu008358 for ; Wed, 4 Aug 2010 11:39:24 -0700 Received: from gxk25 (gxk25.prod.google.com [10.202.11.25]) by wpaz21.hot.corp.google.com with ESMTP id o74IdCLt015002 for ; Wed, 4 Aug 2010 11:39:22 -0700 Received: by gxk25 with SMTP id 25so2414398gxk.29 for ; Wed, 04 Aug 2010 11:39:22 -0700 (PDT) Received: by 10.90.102.2 with SMTP id z2mr6905027agb.84.1280947162468; Wed, 04 Aug 2010 11:39:22 -0700 (PDT) MIME-Version: 1.0 Received: by 10.91.217.9 with HTTP; Wed, 4 Aug 2010 11:39:00 -0700 (PDT) In-Reply-To: <4C536839.70508@codesourcery.com> References: <4C536839.70508@codesourcery.com> From: Martin Thuresson Date: Wed, 4 Aug 2010 11:39:00 -0700 Message-ID: Subject: Re: Update postreload.c to avoid long compilation time To: Bernd Schmidt Cc: gcc-patches X-System-Of-Record: true Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org On Fri, Jul 30, 2010 at 5:03 PM, Bernd Schmidt wrote: > On 07/31/2010 01:07 AM, Martin Thuresson wrote: >> This patch updates the handling of temporary registers in postreload.c >> to avoid very long build times in certain files. >> >> By creating new registers instead of updating one existing one using >> SET_REGNO it avoids going through the scan df structure. >> >> Im new to gcc RTL and appreciate any feedback. >> >> In the (inspired from real code) attached source, the time >> for "reload CSE regs" went down from 20 usr seconds to less than 1. > > I have trouble reproducing the slowness.  Which target are you using? It seems that I did not include the larger testcase I had. I attached it and these are the build times I measured: Target: x86_64-unknown-linux-gnu Options: -g -O2 -ftime-report -c Before: reload CSE regs : 13.65 (81%) usr 0.01 (25%) sys 13.73 (81%) wall 2812 kB ( 4%) ggc After: reload CSE regs : 0.16 ( 6%) usr 0.01 (14%) sys 0.17 ( 6%) wall 2812 kB ( 4%) ggc > > It's a bit unfortunate, and probably avoidable, to create additional > garbage RTL.  Maybe what's really needed is >  df_set_flags (DF_DEFER_INSN_RESCAN); > at the top of postreload?  Can you try that?  Or, even simpler, avoid > the SET_REGNO macro, and check all other occurrences of it.  There seem > to be a few, e.g. in caller-save.c or ira.c, which also probably > shouldn't invoke df. I updated the patch by introducing SET_REGNO_RAW and updated the postreload.c, caller-save.c and ira.c. I saw no new test failures. Thanks, Martin Index: gcc/postreload.c =================================================================== --- gcc/postreload.c (revision 162726) +++ gcc/postreload.c (working copy) @@ -528,7 +528,7 @@ reload_cse_simplify_operands (rtx insn, if (! TEST_HARD_REG_BIT (equiv_regs[i], regno)) continue; - SET_REGNO (testreg, regno); + SET_REGNO_RAW (testreg, regno); PUT_MODE (testreg, mode); /* We found a register equal to this operand. Now look for all Index: gcc/caller-save.c =================================================================== --- gcc/caller-save.c (revision 162726) +++ gcc/caller-save.c (working copy) @@ -124,7 +124,7 @@ reg_save_code (int reg, enum machine_mod /* Update the register number and modes of the register and memory operand. */ - SET_REGNO (test_reg, reg); + SET_REGNO_RAW (test_reg, reg); PUT_MODE (test_reg, mode); PUT_MODE (test_mem, mode); Index: gcc/ira.c =================================================================== --- gcc/ira.c (revision 162726) +++ gcc/ira.c (working copy) @@ -1219,9 +1219,9 @@ setup_prohibited_mode_move_regs (void) { if (! HARD_REGNO_MODE_OK (j, (enum machine_mode) i)) continue; - SET_REGNO (test_reg1, j); + SET_REGNO_RAW (test_reg1, j); PUT_MODE (test_reg1, (enum machine_mode) i); - SET_REGNO (test_reg2, j); + SET_REGNO_RAW (test_reg2, j); PUT_MODE (test_reg2, (enum machine_mode) i); INSN_CODE (move_insn) = -1; recog_memoized (move_insn); Index: gcc/rtl.h =================================================================== --- gcc/rtl.h (revision 162726) +++ gcc/rtl.h (working copy) @@ -1039,6 +1039,7 @@ enum label_kind be used on RHS. Use SET_REGNO to change the value. */ #define REGNO(RTX) (rhs_regno(RTX)) #define SET_REGNO(RTX,N) (df_ref_change_reg_with_loc (REGNO(RTX), N, RTX), XCUINT (RTX, 0, REG) = N) +#define SET_REGNO_RAW(RTX,N) (XCUINT (RTX, 0, REG) = N) /* ORIGINAL_REGNO holds the number the register originally had; for a pseudo register turned into a hard reg this will hold the old pseudo