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[committed,RISC-V] Fix false-positive uninitialized variable

Message ID 9d8d9458-e59d-40d5-84fb-6ae6bf51636b@gmail.com
State New
Headers show
Series [committed,RISC-V] Fix false-positive uninitialized variable | expand

Commit Message

Jeff Law June 9, 2024, 3:19 p.m. UTC 
Andreas noted we were getting an uninit warning after the recent 
constant synthesis changes.  Essentially there's no way for the uninit 
analysis code to know the first entry in the CODES array is a UNKNOWN 
which will set X before its first use.

So trivial initialization with NULL_RTX is the obvious fix.

Pushed to the trunk.

Jeff
commit 932c6f8dd8859afb13475c2de466bd1a159530da
Author: Jeff Law <jlaw@ventanamicro.com>
Date:   Sun Jun 9 09:17:55 2024 -0600

    [committed] [RISC-V] Fix false-positive uninitialized variable
    
    Andreas noted we were getting an uninit warning after the recent constant
    synthesis changes.  Essentially there's no way for the uninit analysis code to
    know the first entry in the CODES array is a UNKNOWN which will set X before
    its first use.
    
    So trivial initialization with NULL_RTX is the obvious fix.
    
    Pushed to the trunk.
    
    gcc/
    
            * config/riscv/riscv.cc (riscv_move_integer): Initialize "x".
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Patch

diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 95f3636f8e4..c17141d909a 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -2720,7 +2720,7 @@  riscv_move_integer (rtx temp, rtx dest, HOST_WIDE_INT value,
   struct riscv_integer_op codes[RISCV_MAX_INTEGER_OPS];
   machine_mode mode;
   int i, num_ops;
-  rtx x;
+  rtx x = NULL_RTX;
 
   mode = GET_MODE (dest);
   /* We use the original mode for the riscv_build_integer call, because HImode