From patchwork Fri Jun 23 15:48:56 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Preudhomme X-Patchwork-Id: 780058 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3wvNDG0Pjwz9t0j for ; Sat, 24 Jun 2017 01:49:17 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="iP/f4iNm"; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :subject:to:references:cc:from:message-id:date:mime-version :in-reply-to:content-type; q=dns; s=default; b=qpdIW3v3yVCa/K/wI Rhp/bK4exLaKtgluweyklu1Q0XV/ropohGVi2hz4zZmoqzpqgMhnjP8DSI1jf9ZJ 5Y4gecBymW2bVjse2tZYyv4mn3QyFvO8GFns4IxHfzjuo/3ufojOgTZGFo/gBcT5 0HJ7tJU1ysv4uKkaLvntIXe80o= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :subject:to:references:cc:from:message-id:date:mime-version :in-reply-to:content-type; s=default; bh=PTVr3Lyr62Z2uujkKA5gYdr SfOw=; b=iP/f4iNm/NhPtsCvrjJ9d4vm/sEIaurPcbdzPiQFBhEQWCKgSnfVIIP bsRPeadCJjEGe4ktXrv5qdyNUTFt2zD7uBiYZj4xPLaC1GOZuqNaK05VEB/23kUN HmenqYi8al41BR+GBCDkEoahY7EUSqie3Lxm737bWlG/o9U1XMww= Received: (qmail 104605 invoked by alias); 23 Jun 2017 15:49:05 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 104475 invoked by uid 89); 23 Jun 2017 15:49:03 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-25.7 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_LAZY_DOMAIN_SECURITY, KAM_LOTSOFHASH, T_RP_MATCHES_RCVD autolearn=ham version=3.3.2 spammy=mcr X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 23 Jun 2017 15:49:00 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 458202B; Fri, 23 Jun 2017 08:48:58 -0700 (PDT) Received: from [10.2.206.52] (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 616943F557; Fri, 23 Jun 2017 08:48:57 -0700 (PDT) Subject: Re: [PATCH, GCC/ARM, Stage 1] Rename FPSCR builtins to correct names To: Kyrill Tkachov , Prakhar Bahuguna , gcc-patches@gcc.gnu.org References: <20170322104630.z7g7nk6sv2xdzhad@e107464-lin.cambridge.arm.com> <58EB9043.8060104@foss.arm.com> Cc: Richard.Earnshaw@arm.com, Ramana.Radhakrishnan@arm.com From: Thomas Preudhomme Message-ID: <9982d9c9-ee19-c423-1e47-d0993987d369@foss.arm.com> Date: Fri, 23 Jun 2017 16:48:56 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.8.0 MIME-Version: 1.0 In-Reply-To: <58EB9043.8060104@foss.arm.com> X-IsSubscribed: yes Hi Kyrill, On 10/04/17 15:01, Kyrill Tkachov wrote: > Hi Prakhar, > Sorry for the delay, > > On 22/03/17 10:46, Prakhar Bahuguna wrote: >> The GCC documentation in section 6.60.8 ARM Floating Point Status and Control >> Intrinsics states that the FPSCR register can be read and written to using the >> intrinsics __builtin_arm_get_fpscr and __builtin_arm_set_fpscr. However, these >> are misnamed within GCC itself and these intrinsic names are not recognised. >> This patch corrects the intrinsic names to match the documentation, and adds >> tests to verify these intrinsics generate the correct instructions. >> >> Testing done: Ran regression tests on arm-none-eabi for Cortex-M4. >> >> 2017-03-09 Prakhar Bahuguna >> >> gcc/ChangeLog: >> >> * gcc/config/arm/arm-builtins.c (arm_init_builtins): Rename >> __builtin_arm_ldfscr to __builtin_arm_get_fpscr, and rename >> __builtin_arm_stfscr to __builtin_arm_set_fpscr. >> * gcc/testsuite/gcc.target/arm/fpscr.c: New file. >> >> Okay for stage 1? > > I see that the mistake was in not addressing one of the review comments in: > https://gcc.gnu.org/ml/gcc-patches/2014-04/msg01832.html > properly in the patch that added these functions :( > > This is ok for stage 1 if a bootstrap and test on arm-none-linux-gnueabihf works > fine > I don't think we want to maintain the __builtin_arm_[ld,st]fscr names for > backwards compatibility > as they were not documented and are __builtin_arm* functions that we don't > guarantee to maintain. How about a backport to GCC 5, 6 & 7? The patch applied cleanly on each of these versions and the testsuite didn't show any regression for any of the backport when run for Cortex-M7. Patches attached for reference. ChangeLog entries: *** gcc/ChangeLog *** 2017-06-20 Thomas Preud'homme Backport from mainline 2017-05-04 Prakhar Bahuguna * gcc/config/arm/arm-builtins.c (arm_init_builtins): Rename __builtin_arm_ldfscr to __builtin_arm_get_fpscr, and rename __builtin_arm_stfscr to __builtin_arm_set_fpscr. *** gcc/testsuite/ChangeLog *** 2017-06-20 Thomas Preud'homme Backport from mainline 2017-05-04 Prakhar Bahuguna gcc/testsuite/ * gcc.target/arm/fpscr.c: New file. Best regards, Thomas diff --git a/gcc/ChangeLog b/gcc/ChangeLog index b23ab131099d8120f02c283edea9d6cac3ed957a..83731befa78a9bf8c672ac52c16f8dd9029757b2 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2017-06-20 Thomas Preud'homme + + Backport from mainline + 2017-05-04 Prakhar Bahuguna + + * gcc/config/arm/arm-builtins.c (arm_init_builtins): Rename + __builtin_arm_ldfscr to __builtin_arm_get_fpscr, and rename + __builtin_arm_stfscr to __builtin_arm_set_fpscr. + 2017-06-20 Andreas Schwab PR target/80970 diff --git a/gcc/config/arm/arm-builtins.c b/gcc/config/arm/arm-builtins.c index 8b7eaa8e81c59d0e18e22908d8748f0e01f5a9a2..792b688f66cd666e4fcef568fadc385c5b332be4 100644 --- a/gcc/config/arm/arm-builtins.c +++ b/gcc/config/arm/arm-builtins.c @@ -1893,10 +1893,10 @@ arm_init_builtins (void) = build_function_type_list (unsigned_type_node, NULL); arm_builtin_decls[ARM_BUILTIN_GET_FPSCR] - = add_builtin_function ("__builtin_arm_ldfscr", ftype_get_fpscr, + = add_builtin_function ("__builtin_arm_get_fpscr", ftype_get_fpscr, ARM_BUILTIN_GET_FPSCR, BUILT_IN_MD, NULL, NULL_TREE); arm_builtin_decls[ARM_BUILTIN_SET_FPSCR] - = add_builtin_function ("__builtin_arm_stfscr", ftype_set_fpscr, + = add_builtin_function ("__builtin_arm_set_fpscr", ftype_set_fpscr, ARM_BUILTIN_SET_FPSCR, BUILT_IN_MD, NULL, NULL_TREE); } diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index fe738a0960bf4af1db9bf8c20a4acb515251ad26..82f4a382d4b1df30807b10bfbfcdbb322dbd1722 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,10 @@ +2017-06-20 Thomas Preud'homme + + Backport from mainline + 2017-05-04 Prakhar Bahuguna + + * gcc.target/arm/fpscr.c: New file. + 2017-06-19 James Greenhalgh Backport from mainline diff --git a/gcc/testsuite/gcc.target/arm/fpscr.c b/gcc/testsuite/gcc.target/arm/fpscr.c new file mode 100644 index 0000000000000000000000000000000000000000..7b4d71d72d8964f6da0d0604bf59aeb4a895df43 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/fpscr.c @@ -0,0 +1,16 @@ +/* Test the fpscr builtins. */ + +/* { dg-do compile } */ +/* { dg-require-effective-target arm_fp_ok } */ +/* { dg-skip-if "need fp instructions" { *-*-* } { "-mfloat-abi=soft" } { "" } } */ +/* { dg-add-options arm_fp } */ + +void +test_fpscr () +{ + volatile unsigned int status = __builtin_arm_get_fpscr (); + __builtin_arm_set_fpscr (status); +} + +/* { dg-final { scan-assembler "mrc\tp10, 7, r\[0-9\]+, cr1, cr0, 0" } } */ +/* { dg-final { scan-assembler "mcr\tp10, 7, r\[0-9\]+, cr1, cr0, 0" } } */