From patchwork Wed Aug 14 06:06:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Zhijin Zeng X-Patchwork-Id: 1972194 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=spacemit.com header.i=@spacemit.com header.a=rsa-sha256 header.s=feishu2303021642 header.b=O2R4Juui; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=server2.sourceware.org; envelope-from=gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=patchwork.ozlabs.org) Received: from server2.sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4WkHpP5ZXXz1yZl for ; Wed, 14 Aug 2024 16:07:09 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 8FEC83858427 for ; Wed, 14 Aug 2024 06:07:07 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from lf-2-32.ptr.blmpb.com (lf-2-32.ptr.blmpb.com [101.36.218.32]) by sourceware.org (Postfix) with ESMTPS id 0B79F3858D3C for ; Wed, 14 Aug 2024 06:06:38 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 0B79F3858D3C Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=spacemit.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=spacemit.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 0B79F3858D3C Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=101.36.218.32 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1723615602; cv=none; b=hUxtY2xcG0QP2XT/iXxNknhC7gc4YdKKfumDDz850O1lfbQ93nAOHYb7qjYMfptZtM3T1YxUlZk109mgN/kxnouUUuVeMuawoxQavqvS2RGzECVUB3TPtHlzGtyll+THpHPaUDN1qK84AW52V+/7boYggj2xljOs46og7aBt11o= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1723615602; c=relaxed/simple; bh=PCzJlXmf0UD0P6wqWJGmXvAAGwND+NNsyC0ckG2HBWc=; h=DKIM-Signature:Date:Message-Id:From:To:Subject:Mime-Version; b=CGNYffAkJyidh2uEFC9s4Yn9j2afIxXG4grhGphrXVE5TKRasveXS0q5pkYsNZJm/B5Slhq4MbOYrxYiMueIHpI7ay0hdeusK2Hy9l+VvpGCjvqnfZgaOlii/+w2a2wKfRA97mWijIlXMrejDTgcNcSUx9Ftzy3HK3cAygZ9z8o= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; s=feishu2303021642; d=spacemit.com; t=1723615584; h=from:subject: mime-version:from:date:message-id:subject:to:cc:reply-to:content-type: mime-version:in-reply-to:message-id; bh=PCzJlXmf0UD0P6wqWJGmXvAAGwND+NNsyC0ckG2HBWc=; b=O2R4Juui55QcyQ4rtW3yXSYrgZ+LjgiBC/+q38/doaN8w+jCohS+sLBcFMnig/C7R6Ysmg QwBD22YMDxUpYISB7TajDX2qFJb9FzeoOadk8kEmGgMwf1CU6ZOsm8TmbWocFMTpwA53lQ DcYJuDNCaIyedmwg1f4hUd71extysRK+BbiziZU6FmGP6nKpH/mNMysqIjXeu3lmmcQ//S m1borjiDH8UArb/jViUwiy+mX2hS9QLIIvfoAJDMT55ccRoI6SezGGD8+7Et7NwHYDo32/ ClNpQfP7kMNlHB2XZIgVTGYjKs4zO7T7vyrO/HCTT4j3RIkRs/KArUlGrPkKYA== Date: Wed, 14 Aug 2024 14:06:23 +0800 Message-Id: <8fd4328940034d8778cca67eaad54e5a2c2b1a6c.1c2f51e1.0a9a.4367.9762.9b6eccc3b634@feishu.cn> From: =?utf-8?b?5pu+5rK76YeR?= To: "gcc-patches@gcc.gnu.org" , "gcc-bugs@gcc.gnu.org" Subject: [PATCH] RISC-V: Fix factor in dwarf_poly_indeterminate_value [PR116305] Mime-Version: 1.0 X-Lms-Return-Path: X-Spam-Status: No, score=-5.3 required=5.0 tests=BAYES_50, BODY_8BITS, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, LIKELY_SPAM_BODY, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE, URIBL_BLACK autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org This patch is to fix the bug (BugId:116305) introduced by the commit bd93ef for risc-v target. The commit bd93ef changes the chunk_num from 1 to TARGET_MIN_VLEN/128 if TARGET_MIN_VLEN is larger than 128 in riscv_convert_vector_bits. So it changes the value of BYTES_PER_RISCV_VECTOR. For example, before merging the commit bd93ef and if TARGET_MIN_VLEN is 256, the value of BYTES_PER_RISCV_VECTOR should be [8, 8], but now [16, 16]. The value of riscv_bytes_per_vector_chunk and BYTES_PER_RISCV_VECTOR are no longer equal. Prologue will use BYTES_PER_RISCV_VECTOR.coeffs[1] to estimate the vlenb register value in riscv_legitimize_poly_move, and dwarf2cfi will also get the estimated vlenb register value in riscv_dwarf_poly_indeterminate_value to calculate the number of times to multiply the vlenb register value. So need to change the factor from riscv_bytes_per_vector_chunk to BYTES_PER_RISCV_VECTOR, otherwise we will get the incorrect dwarf information. The incorrect example as follow: ``` csrr    t0,vlenb slli    t1,t0,1 sub     sp,sp,t1 .cfi_escape 0xf,0xb,0x72,0,0x92,0xa2,0x38,0,0x34,0x1e,0x23,0x50,0x22 ``` The sequence '0x92,0xa2,0x38,0' means the vlenb register, '0x34' means the literal 4, '0x1e' means the multiply operation. But in fact, the vlenb register value just need to multiply the literal 2. gcc/ChangeLog:         * config/riscv/riscv.cc (riscv_dwarf_poly_indeterminate_value): gcc/testsuite/ChangeLog:         * gcc.target/riscv/rvv/base/scalable_vector_cfi.c: New test. Signed-off-by: Zhijin Zeng Signed-off-by: Zhijin Zeng Signed-off-by: Zhijin Zeng Signed-off-by: Zhijin Zeng Signed-off-by: Zhijin Zeng Signed-off-by: Zhijin Zeng ---  gcc/config/riscv/riscv.cc                     |  4 +--  .../riscv/rvv/base/scalable_vector_cfi.c      | 32 +++++++++++++++++++  2 files changed, 34 insertions(+), 2 deletions(-)  create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/scalable_vector_cfi.c -- 2.34.1 This message and any attachment are confidential and may be privileged or otherwise protected from disclosure. If you are not an intended recipient of this message, please delete it and any attachment from your system and notify the sender immediately by reply e-mail. Unintended recipients should not use, copy, disclose or take any action based on this message or any information contained in this message. Emails cannot be guaranteed to be secure or error free as they can be intercepted, amended, lost or destroyed, and you should take full responsibility for security checking. 本邮件及其任何附件具有保密性质，并可能受其他保护或不允许被披露给第三方。如阁下误收到本邮件，敬请立即以回复电子邮件的方式通知发件人，并将本邮件及其任何附件从阁下系统中予以删除。如阁下并非本邮件写明之收件人，敬请切勿使用、复制、披露本邮件或其任何内容，亦请切勿依本邮件或其任何内容而采取任何行动。电子邮件无法保证是一种安全和不会出现任何差错的通信方式，可能会被拦截、修改、丢失或损坏，收件人需自行负责做好安全检查。 diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index 5fe4273beb7..e740fc159dd 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -10773,12 +10773,12 @@ static unsigned int  riscv_dwarf_poly_indeterminate_value (unsigned int i, unsigned int *factor,                                       int *offset)  { -  /* Polynomial invariant 1 == (VLENB / riscv_bytes_per_vector_chunk) - 1. +  /* Polynomial invariant 1 == (VLENB / BYTES_PER_RISCV_VECTOR) - 1.       1. TARGET_MIN_VLEN == 32, polynomial invariant 1 == (VLENB / 4) - 1.       2. TARGET_MIN_VLEN > 32, polynomial invariant 1 == (VLENB / 8) - 1.    */    gcc_assert (i == 1); -  *factor = riscv_bytes_per_vector_chunk; +  *factor = BYTES_PER_RISCV_VECTOR.coeffs[1];    *offset = 1;    return RISCV_DWARF_VLENB;  } diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/scalable_vector_cfi.c b/gcc/testsuite/gcc.target/riscv/rvv/base/scalable_vector_cfi.c new file mode 100644 index 00000000000..184da10caf3 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/scalable_vector_cfi.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-g -O3 -march=rv64gcv -mabi=lp64d" } */ +/* { dg-skip-if "" { *-*-* } {"-O2" "-O1" "-O0" "-Og" "-Oz" "-flto"} } */ +/* { dg-final { scan-assembler {cfi_escape .*0x92,0xa2,0x38,0,0x32,0x1e} } } */ + +#include "riscv_vector.h" + +#define PI_2 1.570796326795 + +extern void func(float *result); + +void test(const float *ys, const float *xs, float *result, size_t length) { +    size_t gvl = __riscv_vsetvlmax_e32m2(); +    vfloat32m2_t vpi2 = __riscv_vfmv_v_f_f32m2(PI_2, gvl); + +    for(size_t i = 0; i < length;) { +        gvl = __riscv_vsetvl_e32m2(length - i); +        vfloat32m2_t y = __riscv_vle32_v_f32m2(ys, gvl); +        vfloat32m2_t x = __riscv_vle32_v_f32m2(xs, gvl); +        vbool16_t mask0  = __riscv_vmflt_vv_f32m2_b16(x, y, gvl); +        vfloat32m2_t fixpi = __riscv_vfrsub_vf_f32m2_mu(mask0, vpi2, vpi2, 0, gvl); + +        __riscv_vse32_v_f32m2(result, fixpi, gvl); + +        func(result); + +        i += gvl; +        ys += gvl; +        xs += gvl; +        result += gvl; +    } +}