@@ -25549,8 +25549,8 @@ rs6000_generate_float2_double_code (rtx dst, rtx src1, rtx src2)
rtx_tmp2 = gen_reg_rtx (V4SFmode);
rtx_tmp3 = gen_reg_rtx (V4SFmode);
- emit_insn (gen_vsx_xvcdpsp (rtx_tmp2, rtx_tmp0));
- emit_insn (gen_vsx_xvcdpsp (rtx_tmp3, rtx_tmp1));
+ emit_insn (gen_vsx_xvcvdpsp (rtx_tmp2, rtx_tmp0));
+ emit_insn (gen_vsx_xvcvdpsp (rtx_tmp3, rtx_tmp1));
if (BYTES_BIG_ENDIAN)
emit_insn (gen_p8_vmrgew_v4sf (dst, rtx_tmp2, rtx_tmp3));
@@ -301,7 +301,6 @@
UNSPEC_VSX_XVCVSXDDP
UNSPEC_VSX_XVCVUXDDP
UNSPEC_VSX_XVCVDPSXDS
- UNSPEC_VSX_XVCDPSP
UNSPEC_VSX_XVCVDPUXDS
UNSPEC_VSX_SIGN_EXTEND
UNSPEC_VSX_XVCVSPSXWS
@@ -2367,14 +2366,6 @@
"xvcvuxdsp %x0,%x1"
[(set_attr "type" "vecdouble")])
-(define_insn "vsx_xvcdpsp"
- [(set (match_operand:V4SF 0 "vsx_register_operand" "=wa")
- (unspec:V4SF [(match_operand:V2DF 1 "vsx_register_operand" "wa")]
- UNSPEC_VSX_XVCDPSP))]
- "VECTOR_UNIT_VSX_P (V2DFmode)"
- "xvcvdpsp %x0,%x1"
- [(set_attr "type" "vecdouble")])
-
;; Convert from 32-bit to 64-bit types
;; Provide both vector and scalar targets
(define_insn "vsx_xvcvsxwdp"
Hi, I noticed that vsx_xvcdpsp and vsx_xvcvdpsp are almost the same, and vsx_xvcdpsp looks replaceable with vsx_xvcvdpsp since it's only called by gen_*. Bootstrapped and regress tested on powerpc64le-linux-gnu. gcc/ChangeLog 2019-10-23 Kewen Lin <linkw@gcc.gnu.org> * config/rs6000/vsx.md (vsx_xvcdpsp): Remove define_insn. (UNSPEC_VSX_XVCDPSP): Remove. * config/rs6000/rs6000.c (rs6000_generate_float2_double_code): Replace gen_vsx_xvcdpsp by gen_vsx_xvcvdpsp. From 8c6309c131b7614ed8d6aeb4ca2d3d89ab0b8d38 Mon Sep 17 00:00:00 2001 From: Kewen Lin <linkw@linux.ibm.com> Date: Tue, 8 Oct 2019 01:51:06 -0500 Subject: [PATCH 1/3] Replace vsx_xvcdpsp by vsx_xvcvdpsp --- gcc/config/rs6000/rs6000.c | 4 ++-- gcc/config/rs6000/vsx.md | 9 --------- 2 files changed, 2 insertions(+), 11 deletions(-)