===================================================================
@@ -22,6 +22,22 @@
(include "predicates.md")
(include "constraints.md")
+(define_constants
+ [
+ ;; Register numbers
+ (FRAME_POINTER_REGNUM 5)
+ (STACK_POINTER_REGNUM 6)
+ (PC_REGNUM 7)
+ (AC0_REGNUM 8)
+ (AC3_REGNUM 11)
+ (AC4_REGNUM 12)
+ (AC5_REGNUM 13)
+ (FIRST_PSEUDO_REGISTER 14)
+ ;; Branch offset limits, as byte offsets from instruction address
+ (MIN_BRANCH -254)
+ (MAX_BRANCH 256)
+ (MIN_SOB -126)
+ (MAX_SOB 0)])
;; HI is 16 bit
;; QI is 8 bit
@@ -165,12 +181,12 @@
return \"\";
}"
- [(set (attr "length") (if_then_else (ior (le (minus (match_dup 0)
+ [(set (attr "length") (if_then_else (ior (lt (minus (match_dup 0)
(pc))
- (const_int -256))
- (ge (minus (match_dup 0)
+ (const_int MIN_SOB))
+ (gt (minus (match_dup 0)
(pc))
- (const_int 0)))
+ (const_int MAX_SOB)))
(const_int 8)
(const_int 2)))])
@@ -228,12 +244,12 @@
(pc)))]
""
"* return output_jump(GET_CODE (operands[0]), 0, get_attr_length(insn));"
- [(set (attr "length") (if_then_else (ior (le (minus (match_dup 1)
+ [(set (attr "length") (if_then_else (ior (lt (minus (match_dup 1)
(pc))
- (const_int -256))
- (ge (minus (match_dup 1)
+ (const_int MIN_BRANCH))
+ (gt (minus (match_dup 1)
(pc))
- (const_int 256)))
+ (const_int MAX_BRANCH)))
(const_int 6)
(const_int 2)))])
@@ -248,12 +264,12 @@
(label_ref (match_operand 1 "" ""))))]
""
"* return output_jump(GET_CODE (operands[0]), 1, get_attr_length(insn));"
- [(set (attr "length") (if_then_else (ior (le (minus (match_dup 1)
+ [(set (attr "length") (if_then_else (ior (lt (minus (match_dup 1)
(pc))
- (const_int -256))
- (ge (minus (match_dup 1)
+ (const_int MIN_BRANCH))
+ (gt (minus (match_dup 1)
(pc))
- (const_int 256)))
+ (const_int MAX_BRANCH)))
(const_int 6)
(const_int 2)))])
@@ -1296,12 +1312,12 @@
return \"br %l0\";
return \"jmp %l0\";
}"
- [(set (attr "length") (if_then_else (ior (le (minus (match_dup 0)
+ [(set (attr "length") (if_then_else (ior (lt (minus (match_dup 0)
(pc))
- (const_int -256))
- (ge (minus (match_dup 0)
+ (const_int MIN_BRANCH))
+ (gt (minus (match_dup 0)
(pc))
- (const_int 256)))
+ (const_int MAX_BRANCH)))
(const_int 4)
(const_int 2)))])
===================================================================
@@ -42,11 +42,6 @@
#include "target-def.h"
#include "df.h"
-/*
-#define FPU_REG_P(X) ((X)>=8 && (X)<14)
-#define CPU_REG_P(X) ((X)>=0 && (X)<8)
-*/
-
/* this is the current value returned by the macro FIRST_PARM_OFFSET
defined in tm.h */
int current_first_parm_offset;
@@ -295,7 +290,7 @@
asm_fprintf (stream, "\tsub $%#wo, sp\n", fsize);
/* save CPU registers */
- for (regno = 0; regno < 8; regno++)
+ for (regno = 0; regno <= PC_REGNUM; regno++)
if (df_regs_ever_live_p (regno) && ! call_used_regs[regno])
if (! ((regno == FRAME_POINTER_REGNUM)
&& frame_pointer_needed))
@@ -305,7 +300,7 @@
/* via_ac specifies the ac to use for saving ac4, ac5 */
via_ac = -1;
- for (regno = 8; regno < FIRST_PSEUDO_REGISTER ; regno++)
+ for (regno = AC0_REGNUM; regno <= AC5_REGNUM ; regno++)
{
/* ac0 - ac3 */
if (LOAD_FPU_REG_P(regno)
@@ -366,7 +361,7 @@
/* hope this is safe - m68k does it also .... */
df_set_regs_ever_live (FRAME_POINTER_REGNUM, false);
- for (i =7, j = 0 ; i >= 0 ; i--)
+ for (i = PC_REGNUM, j = 0 ; i >= 0 ; i--)
if (df_regs_ever_live_p (i) && ! call_used_regs[i])
j++;
@@ -374,22 +369,22 @@
k = 2*j;
/* change fp -> r5 due to the compile error on libgcc2.c */
- for (i =7 ; i >= 0 ; i--)
+ for (i = PC_REGNUM ; i >= 0 ; i--)
if (df_regs_ever_live_p (i) && ! call_used_regs[i])
fprintf(stream, "\tmov %#" HOST_WIDE_INT_PRINT "o(r5), %s\n",
(-fsize-2*j--)&0xffff, reg_names[i]);
/* get ACs */
- via_ac = FIRST_PSEUDO_REGISTER -1;
+ via_ac = AC5_REGNUM;
- for (i = FIRST_PSEUDO_REGISTER; i > 7; i--)
+ for (i = AC5_REGNUM; i >= AC0_REGNUM; i--)
if (df_regs_ever_live_p (i) && ! call_used_regs[i])
{
via_ac = i;
k += 8;
}
- for (i = FIRST_PSEUDO_REGISTER; i > 7; i--)
+ for (i = AC5_REGNUM; i >= AC0_REGNUM; i--)
{
if (LOAD_FPU_REG_P(i)
&& df_regs_ever_live_p (i)
@@ -418,14 +413,14 @@
}
else
{
- via_ac = FIRST_PSEUDO_REGISTER -1;
+ via_ac = AC5_REGNUM;
/* get ACs */
- for (i = FIRST_PSEUDO_REGISTER; i > 7; i--)
+ for (i = AC5_REGNUM; i >= AC0_REGNUM; i--)
if (df_regs_ever_live_p (i) && call_used_regs[i])
via_ac = i;
- for (i = FIRST_PSEUDO_REGISTER; i > 7; i--)
+ for (i = AC5_REGNUM; i >= AC0_REGNUM; i--)
{
if (LOAD_FPU_REG_P(i)
&& df_regs_ever_live_p (i)
@@ -443,7 +438,7 @@
}
}
- for (i=7; i >= 0; i--)
+ for (i = PC_REGNUM; i >= 0; i--)
if (df_regs_ever_live_p (i) && !call_used_regs[i])
fprintf(stream, "\tmov (sp)+, %s\n", reg_names[i]);
===================================================================
@@ -22,10 +22,10 @@
#define CONSTANT_POOL_BEFORE_FUNCTION 0
/* check whether load_fpu_reg or not */
-#define LOAD_FPU_REG_P(x) ((x)>=8 && (x)<=11)
-#define NO_LOAD_FPU_REG_P(x) ((x)==12 || (x)==13)
+#define LOAD_FPU_REG_P(x) ((x) >= AC0_REGNUM && (x) <= AC3_REGNUM)
+#define NO_LOAD_FPU_REG_P(x) ((x) == AC4_REGNUM || (x) == AC5_REGNUM)
#define FPU_REG_P(x) (LOAD_FPU_REG_P(x) || NO_LOAD_FPU_REG_P(x))
-#define CPU_REG_P(x) ((x)<8)
+#define CPU_REG_P(x) ((x) <= PC_REGNUM)
/* Names to predefine in the preprocessor for this target machine. */
@@ -140,8 +140,6 @@
we have 8 integer registers, plus 6 float
(don't use scratch float !) */
-#define FIRST_PSEUDO_REGISTER 14
-
/* 1 for registers that have pervasive standard uses
and are not available for the register allocator.
@@ -191,7 +189,7 @@
} \
\
if (TARGET_AC0) \
- call_used_regs[8] = 1; \
+ call_used_regs[AC0_REGNUM] = 1; \
if (TARGET_UNIX_ASM) \
{ \
/* Change names of FPU registers for the UNIX assembler. */ \
@@ -211,7 +209,7 @@
*/
#define HARD_REGNO_NREGS(REGNO, MODE) \
-((REGNO < 8)? \
+((REGNO <= PC_REGNUM)? \
((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) \
:1)
@@ -222,7 +220,7 @@
FPU can only hold DF - simplifies life!
*/
#define HARD_REGNO_MODE_OK(REGNO, MODE) \
-(((REGNO) < 8)? \
+(((REGNO) <= PC_REGNUM)? \
((GET_MODE_BITSIZE(MODE) <= 16) \
|| (GET_MODE_BITSIZE(MODE) >= 32 && !((REGNO) & 1))) \
:(MODE) == DFmode)
@@ -237,17 +235,8 @@
/* Specify the registers used for certain standard purposes.
The values of these macros are register numbers. */
-/* the pdp11 pc overloaded on a register that the compiler knows about. */
-#define PC_REGNUM 7
-
-/* Register to use for pushing function arguments. */
-#define STACK_POINTER_REGNUM 6
-
-/* Base register for access to local variables of the function. */
-#define FRAME_POINTER_REGNUM 5
-
/* Base register for access to arguments of the function. */
-#define ARG_POINTER_REGNUM 5
+#define ARG_POINTER_REGNUM FRAME_POINTER_REGNUM
/* Register in which static-chain is passed to a function. */
/* ??? - i don't want to give up a reg for this! */
@@ -313,7 +302,10 @@
or could index an array. */
#define REGNO_REG_CLASS(REGNO) \
-((REGNO)>=8?((REGNO)<=11?LOAD_FPU_REGS:NO_LOAD_FPU_REGS):(((REGNO)&1)?MUL_REGS:GENERAL_REGS))
+((REGNO) >= AC0_REGNUM ? \
+ ((REGNO) <= AC3_REGNUM ? LOAD_FPU_REGS : \
+ NO_LOAD_FPU_REGS) : \
+ (((REGNO) & 1) ? MUL_REGS : GENERAL_REGS))
/* The class value for index registers, and the one for base regs. */
@@ -441,10 +433,10 @@
{ \
int offset, regno; \
offset = get_frame_size(); \
- for (regno = 0; regno < 8; regno++) \
+ for (regno = 0; regno <= PC_REGNUM; regno++) \
if (df_regs_ever_live_p (regno) && ! call_used_regs[regno]) \
offset += 2; \
- for (regno = 8; regno < 14; regno++) \
+ for (regno = AC0_REGNUM; regno <= AC5_REGNUM; regno++) \
if (df_regs_ever_live_p (regno) && ! call_used_regs[regno]) \
offset += 8; \
/* offset -= 2; no fp on stack frame */ \
@@ -467,9 +459,9 @@
has been allocated, which happens in local-alloc.c. */
#define REGNO_OK_FOR_INDEX_P(REGNO) \
- ((REGNO) < 8 || (unsigned) reg_renumber[REGNO] < 8)
+ ((REGNO) <= PC_REGNUM || (unsigned) reg_renumber[REGNO] <= PC_REGNUM)
#define REGNO_OK_FOR_BASE_P(REGNO) \
- ((REGNO) < 8 || (unsigned) reg_renumber[REGNO] < 8)
+ ((REGNO) <= PC_REGNUM || (unsigned) reg_renumber[REGNO] <= PC_REGNUM)
/* Now macros that check whether X is a register and also,
strictly, whether it is in a specified class.
@@ -560,10 +552,10 @@
/* accept -(SP) -- which uses PRE_MODIFY for byte mode */ \
if (GET_CODE (operand) == PRE_MODIFY \
&& GET_CODE (XEXP (operand, 0)) == REG \
- && REGNO (XEXP (operand, 0)) == 6 \
+ && REGNO (XEXP (operand, 0)) == STACK_POINTER_REGNUM \
&& GET_CODE ((xfoob = XEXP (operand, 1))) == PLUS \
&& GET_CODE (XEXP (xfoob, 0)) == REG \
- && REGNO (XEXP (xfoob, 0)) == 6 \
+ && REGNO (XEXP (xfoob, 0)) == STACK_POINTER_REGNUM \
&& CONSTANT_P (XEXP (xfoob, 1)) \
&& INTVAL (XEXP (xfoob,1)) == -2) \
goto ADDR; \
@@ -571,10 +563,10 @@
/* accept (SP)+ -- which uses POST_MODIFY for byte mode */ \
if (GET_CODE (operand) == POST_MODIFY \
&& GET_CODE (XEXP (operand, 0)) == REG \
- && REGNO (XEXP (operand, 0)) == 6 \
+ && REGNO (XEXP (operand, 0)) == STACK_POINTER_REGNUM \
&& GET_CODE ((xfoob = XEXP (operand, 1))) == PLUS \
&& GET_CODE (XEXP (xfoob, 0)) == REG \
- && REGNO (XEXP (xfoob, 0)) == 6 \
+ && REGNO (XEXP (xfoob, 0)) == STACK_POINTER_REGNUM \
&& CONSTANT_P (XEXP (xfoob, 1)) \
&& INTVAL (XEXP (xfoob,1)) == 2) \
goto ADDR; \