From patchwork Fri Jan 20 16:32:37 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nick Clifton X-Patchwork-Id: 717793 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3v4mTr3D5Bz9sQw for ; Sat, 21 Jan 2017 03:33:03 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="wfzo4CJS"; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:mime-version:content-type; q=dns; s=default; b=E0SKU+ndKc6aaUEXsJuTvkjnGrWoH34AJRWRym+pCvMSnGFt3r ahfQaHsM6QKMRhdRTFc47s02ze9eao6ozuz5UpfKUmfEyhpC+a7+mOOqf5RHfbAw 3FxGV7wxZCmCBdX81rwros8NDnw2SSWwMzkX91AYQPXnbQfgEgYspK77c= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:mime-version:content-type; s= default; bh=PRxUm4LR4DP5iH7r1vCexLGiBso=; b=wfzo4CJS166Xp9mSuCGQ +A5dhj1tWTiNXGAjeAWhQj0WrS9pwy4/3FHIJ/rwJ+PDy2bVxhmCFPbTX4zd01Il E2l66EaN0o1GyxDciuOtXzH27J9Z7WMKeTBN7Nflc/mUG9bK/N/kqCyZMKa5o+z3 hVnCZwfZXNj+pivcYR322rI= Received: (qmail 69083 invoked by alias); 20 Jan 2017 16:32:55 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 68825 invoked by uid 89); 20 Jan 2017 16:32:42 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-HELO: mx1.redhat.com Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 20 Jan 2017 16:32:42 +0000 Received: from int-mx13.intmail.prod.int.phx2.redhat.com (int-mx13.intmail.prod.int.phx2.redhat.com [10.5.11.26]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 7AC54C05AA48; Fri, 20 Jan 2017 16:32:42 +0000 (UTC) Received: from snowball.redhat.com (ovpn-117-1.ams2.redhat.com [10.36.117.1]) by int-mx13.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id v0KGWccg011353 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Fri, 20 Jan 2017 11:32:41 -0500 From: Nick Clifton To: christophe.lyon@linaro.org, rguenther@suse.de, amker.cheng@gmail.com Cc: gcc-patches@gcc.gnu.org Subject: Re: [PATCH] Fix PR78189 Date: Fri, 20 Jan 2017 16:32:37 +0000 Message-ID: <87tw8tofoa.fsf@redhat.com> MIME-Version: 1.0 X-IsSubscribed: yes Hi Guys, [I have been asked to look at this PR in the hopes that it can be fixed soon and so no longer act as a blocker for the gcc 7 branch]. It seems to me that Richard's proposed patch does work: https://gcc.gnu.org/ml/gcc-patches/2016-11/msg00909.html The only problem is that the check_effective_target_vect_hw_misalign proc is always returning 0 (or false) for ARM, even when unaligned vectors are supported. This is why Richard's patch introduces a new failure for the arm-* targets. So what I would like to suggest is an extended patch (attached) which also updates the check_effective_target_vect_hw_misalign proc to use the check_effective_target_arm_vect_no_misalign proc. With this patch applied not only does the gcc.dg/vect/vect-strided-a-u8-i2-gap.c test for both big-endian and little-endian arm targets, but there is also a significant reduction in the number of failures in the gcc.dg/vect tests overall: Little Endian ARM: < # of expected passes 3275 < # of unexpected failures 63 < # of unexpected successes 125 < # of expected failures 123 < # of unsupported tests 153 --- > # of expected passes 3448 > # of unexpected failures 2 > # of unexpected successes 14 > # of expected failures 131 > # of unsupported tests 151 Big Endian ARM: < # of expected passes 2995 < # of unexpected failures 269 < # of unexpected successes 21 < # of expected failures 128 --- > # of expected passes 3037 > # of unexpected failures 127 > # of unexpected successes 24 > # of expected failures 228 Which looks like a win to me. So - any objections to my applying this patch and then closing the PR ? Cheers Nick gcc/ChangeLog 2017-01-20 Richard Biener Nick Clifton PR testsuite/78421 * lib/target-supports.exp (check_effective_target_vect_hw_misalign): If the target is ARM return the result of the check_effective_target_arm_vect_no_misalign proc. * gcc.dg/vect/vect-strided-a-u8-i2-gap.c: If the target does not support unaligned vectors then only expect one of the loops to be unrolled. Index: gcc/testsuite/gcc.dg/vect/vect-strided-a-u8-i2-gap.c =================================================================== --- gcc/testsuite/gcc.dg/vect/vect-strided-a-u8-i2-gap.c (revision 244691) +++ gcc/testsuite/gcc.dg/vect/vect-strided-a-u8-i2-gap.c (working copy) @@ -71,5 +71,6 @@ return 0; } -/* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" { target vect_strided2 } } } */ +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_strided2 && { ! vect_hw_misalign } } } } } */ +/* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" { target { vect_strided2 && vect_hw_misalign } } } } */ Index: gcc/testsuite/lib/target-supports.exp =================================================================== --- gcc/testsuite/lib/target-supports.exp (revision 244691) +++ gcc/testsuite/lib/target-supports.exp (working copy) @@ -5732,6 +5732,9 @@ || ([istarget mips*-*-*] && [et-is-effective-target mips_msa]) } { set et_vect_hw_misalign_saved($et_index) 1 } + if { [istarget arm*-*-*] } { + set et_vect_hw_misalign_saved($et_index) [check_effective_target_arm_vect_no_misalign] + } } verbose "check_effective_target_vect_hw_misalign:\ returning $et_vect_hw_misalign_saved($et_index)" 2