From patchwork Mon May 18 18:24:09 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Sandiford X-Patchwork-Id: 473544 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 5ACAE140D4D for ; Tue, 19 May 2015 04:24:27 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=D3WBRgGO; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:references:date:in-reply-to:message-id:mime-version :content-type:content-transfer-encoding; q=dns; s=default; b=aN9 JLGgJG0GVdVsjBu96WKhFi40WbwnYYeB4o33Kg8cyK6dfAi3AB8DvnbYA38d193z XBl7momdO2/2lcTXGyYDgKdU4uDSWnATE3cd7BScpd8KIKN4iHU62uJamzJkgHqp bepVNDiPsZNOyiEkQ1dA6WYUyeeh5VR2fb4FBSlM= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:references:date:in-reply-to:message-id:mime-version :content-type:content-transfer-encoding; s=default; bh=vCpR9cnXQ C/J070cgnH0bvLApf0=; b=D3WBRgGOlp3I7voD5eb4i1t5jrsYgUaNjnFk8nWXn ydxi/bTSarVKKwa+3RjdhmaHwikAHX7qEfZTaD03SqfDVQwn0f6tfPYmMiuhIGqE JYM40EDDLywx/bVS+n2RZsjBD2Btzg6hyGx0WZGsOMyzV8/2Oq5lXlNv4gPcSdYB /0= Received: (qmail 84099 invoked by alias); 18 May 2015 18:24:19 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 84087 invoked by uid 89); 18 May 2015 18:24:19 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=0.1 required=5.0 tests=AWL, BAYES_50, KAM_ASCII_DIVIDERS, SPF_PASS autolearn=no version=3.3.2 X-HELO: eu-smtp-delivery-143.mimecast.com Received: from eu-smtp-delivery-143.mimecast.com (HELO eu-smtp-delivery-143.mimecast.com) (146.101.78.143) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 18 May 2015 18:24:18 +0000 Received: from cam-owa1.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.140]) by uk-mta-7.uk.mimecast.lan; Mon, 18 May 2015 19:24:10 +0100 Received: from localhost ([10.1.2.79]) by cam-owa1.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Mon, 18 May 2015 19:24:10 +0100 From: Richard Sandiford To: gcc-patches@gcc.gnu.org Mail-Followup-To: gcc-patches@gcc.gnu.org, richard.sandiford@arm.com Subject: [7/9] Record the number of registers in a REG References: <87oalhu59s.fsf@e105548-lin.cambridge.arm.com> Date: Mon, 18 May 2015 19:24:09 +0100 In-Reply-To: <87oalhu59s.fsf@e105548-lin.cambridge.arm.com> (Richard Sandiford's message of "Mon, 18 May 2015 19:09:19 +0100") Message-ID: <87siatsq0m.fsf@e105548-lin.cambridge.arm.com> User-Agent: Gnus/5.130012 (Ma Gnus v0.12) Emacs/24.3 (gnu/linux) MIME-Version: 1.0 X-MC-Unique: 75vG5z02RNG9XUxAyY_z8g-1 This is the main patch, to record REG_NREGS in the REG itself. The END_REGNO/END_HARD_REGNO distinction goes away in the next patch. gcc/ * rtl.h (reg_info): Add an nregs field. (REG_NREGS): Use it. (SET_REGNO_RAW): Delete. (set_regno_raw): New function. * regs.h (END_HARD_REGNO): Make equivalent to END_REGNO. (END_REGNO): Redefine in terms of REG_NREGS. * read-rtl.c (read_rtx_code): Call set_regno_raw instead of SET_REGNO_RAW. * emit-rtl.c (set_mode_and_regno): Likewise. * df-scan.c (df_ref_change_reg_with_loc): Use set_mode_and_regno instead of SET_REGNO_RAW. Index: gcc/rtl.h =================================================================== --- gcc/rtl.h 2015-05-18 08:34:38.532523211 +0100 +++ gcc/rtl.h 2015-05-18 08:36:23.407245048 +0100 @@ -210,7 +210,9 @@ struct GTY(()) reg_info { /* The value of REGNO. */ unsigned int regno; - unsigned int unused : 32; + /* The value of REG_NREGS. */ + unsigned int nregs : 8; + unsigned int unused : 24; /* The value of REG_ATTRS. */ reg_attrs *attrs; @@ -1712,15 +1714,11 @@ #define LABEL_REF_LABEL(LABREF) XCEXP (L be used on RHS. Use SET_REGNO to change the value. */ #define REGNO(RTX) (rhs_regno(RTX)) #define SET_REGNO(RTX, N) (df_ref_change_reg_with_loc (RTX, N)) -#define SET_REGNO_RAW(RTX, N) (REG_CHECK (RTX)->regno = N) /* Return the number of consecutive registers in a REG. This is always 1 for pseudo registers and is determined by HARD_REGNO_NREGS for hard registers. */ -#define REG_NREGS(RTX) \ - (REGNO (RTX) < FIRST_PSEUDO_REGISTER \ - ? (unsigned int) hard_regno_nregs[REGNO (RTX)][GET_MODE (RTX)] \ - : 1) +#define REG_NREGS(RTX) (REG_CHECK (RTX)->nregs) /* ORIGINAL_REGNO holds the number the register originally had; for a pseudo register turned into a hard reg this will hold the old pseudo @@ -1735,6 +1733,15 @@ rhs_regno (const_rtx x) return REG_CHECK (x)->regno; } +/* Change the REGNO and REG_NREGS of REG X to the specified values, + bypassing the df machinery. */ +static inline void +set_regno_raw (rtx x, unsigned int regno, unsigned int nregs) +{ + reg_info *reg = REG_CHECK (x); + reg->regno = regno; + reg->nregs = nregs; +} /* 1 if RTX is a reg or parallel that is the current function's return value. */ Index: gcc/regs.h =================================================================== --- gcc/regs.h 2015-05-18 08:34:38.532523211 +0100 +++ gcc/regs.h 2015-05-18 08:36:11.000000000 +0100 @@ -288,11 +288,11 @@ end_hard_regno (machine_mode mode, unsig /* Likewise for hard register X. */ -#define END_HARD_REGNO(X) end_hard_regno (GET_MODE (X), REGNO (X)) +#define END_HARD_REGNO(X) END_REGNO (X) /* Likewise for hard or pseudo register X. */ -#define END_REGNO(X) (HARD_REGISTER_P (X) ? END_HARD_REGNO (X) : REGNO (X) + 1) +#define END_REGNO(X) (REGNO (X) + REG_NREGS (X)) /* Add to REGS all the registers required to store a value of mode MODE in register REGNO. */ Index: gcc/read-rtl.c =================================================================== --- gcc/read-rtl.c 2015-05-18 08:34:38.532523211 +0100 +++ gcc/read-rtl.c 2015-05-18 08:34:38.532523211 +0100 @@ -1349,7 +1349,7 @@ read_rtx_code (const char *code_name) case 'r': read_name (&name); validate_const_int (name.string); - SET_REGNO_RAW (return_rtx, atoi (name.string)); + set_regno_raw (return_rtx, atoi (name.string), 1); REG_ATTRS (return_rtx) = NULL; break; Index: gcc/emit-rtl.c =================================================================== --- gcc/emit-rtl.c 2015-05-18 08:34:38.532523211 +0100 +++ gcc/emit-rtl.c 2015-05-18 08:34:38.532523211 +0100 @@ -435,8 +435,11 @@ gen_blockage (void) void set_mode_and_regno (rtx x, machine_mode mode, unsigned int regno) { + unsigned int nregs = (HARD_REGISTER_NUM_P (regno) + ? hard_regno_nregs[regno][mode] + : 1); PUT_MODE_RAW (x, mode); - SET_REGNO_RAW (x, regno); + set_regno_raw (x, regno, nregs); } /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and Index: gcc/df-scan.c =================================================================== --- gcc/df-scan.c 2015-05-18 08:34:38.532523211 +0100 +++ gcc/df-scan.c 2015-05-18 08:36:11.000000000 +0100 @@ -1930,7 +1930,7 @@ df_ref_change_reg_with_loc (rtx loc, uns DF_REG_EQ_USE_GET (new_regno), new_regno, loc); } - SET_REGNO_RAW (loc, new_regno); + set_mode_and_regno (loc, GET_MODE (loc), new_regno); }