From patchwork Fri Oct 17 14:54:59 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Sandiford X-Patchwork-Id: 400548 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id E34911400EA for ; Sat, 18 Oct 2014 01:55:11 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:references:date:in-reply-to:message-id :mime-version:content-type:content-transfer-encoding; q=dns; s= default; b=nh++4R3xANKxdDXpUsdEGKxiQ7oMxR89SeoVcLtSPf93loPBqXijh pju80pwPM5611FZ/LK1X9CEOeklWmuqvdG7uD9BbqFhBolYmLe1TWJmKQ2w23Grn 1RYq1vTW0QiekuCkB2M7TocRP5kh04YQ1+iKFN4O/lyhuvb8bycF10= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:references:date:in-reply-to:message-id :mime-version:content-type:content-transfer-encoding; s=default; bh=WWULLsWuOKjHeiVjKROZcFK9uKw=; b=ok3+Pj0/CW98beLnn1lMHTdWpVus nRwYRnm+QOPOOxV6/LafKLAWuwoQXLdwXQsXYrdY4+nNButC31RIjgE8EmceEjdf an+gfyXjBFxr8mdFZmWBrYL8zy1P5qqYckFj9jO8FEHiT5L/dwaYwyRksExA1VX4 Asab9xZUw/XlliE= Received: (qmail 30889 invoked by alias); 17 Oct 2014 14:55:05 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 30877 invoked by uid 89); 17 Oct 2014 14:55:03 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=0.7 required=5.0 tests=AWL, BAYES_00, MEDICAL_SUBJECT, SPF_PASS autolearn=no version=3.3.2 X-HELO: service87.mimecast.com Received: from service87.mimecast.com (HELO service87.mimecast.com) (91.220.42.44) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 17 Oct 2014 14:55:02 +0000 Received: from cam-owa1.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.21]) by service87.mimecast.com; Fri, 17 Oct 2014 15:55:00 +0100 Received: from localhost ([10.1.255.212]) by cam-owa1.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Fri, 17 Oct 2014 15:55:00 +0100 From: Richard Sandiford To: gcc-patches@gcc.gnu.org Mail-Followup-To: gcc-patches@gcc.gnu.org, vmakarov@redhat.com, ubizjak@gmail.com, markus@trippelsdorf.de, Ganesh.Gopalasubramanian@amd.com, richard.sandiford@arm.com Cc: vmakarov@redhat.com, ubizjak@gmail.com, markus@trippelsdorf.de, Ganesh.Gopalasubramanian@amd.com Subject: [PATCH 5/5] Use preferred_for_speed in i386.md References: <87bnpabvvx.fsf@e105548-lin.cambridge.arm.com> Date: Fri, 17 Oct 2014 15:54:59 +0100 In-Reply-To: <87bnpabvvx.fsf@e105548-lin.cambridge.arm.com> (Richard Sandiford's message of "Fri, 17 Oct 2014 15:42:26 +0100") Message-ID: <87mw8uagqk.fsf@e105548-lin.cambridge.arm.com> User-Agent: Gnus/5.130012 (Ma Gnus v0.12) Emacs/24.3 (gnu/linux) MIME-Version: 1.0 X-MC-Unique: 114101715550003501 Undo the original fix for 61630 and use preferred_for_speed in the problematic pattern. I've not written many gcc.target/i386 tests so the markup might need some work. Richard gcc/ * lra.c (lra): Remove call to recog_init. * config/i386/i386.md (preferred_for_speed): New attribute (*float2_sse): Override it instead of "enabled". gcc/testsuite/ * gcc.target/i386/conversion-2.c: New test. Index: gcc/lra.c =================================================================== --- gcc/lra.c 2014-10-17 15:47:34.357453465 +0100 +++ gcc/lra.c 2014-10-17 15:53:10.889463339 +0100 @@ -2116,11 +2116,6 @@ lra (FILE *f) lra_in_progress = 1; - /* The enable attributes can change their values as LRA starts - although it is a bad practice. To prevent reuse of the outdated - values, clear them. */ - recog_init (); - lra_live_range_iter = lra_coalesce_iter = 0; lra_constraint_iter = lra_constraint_iter_after_spill = 0; lra_inheritance_iter = lra_undo_inheritance_iter = 0; Index: gcc/config/i386/i386.md =================================================================== --- gcc/config/i386/i386.md 2014-10-01 10:48:51.079918153 +0100 +++ gcc/config/i386/i386.md 2014-10-17 15:53:10.889463339 +0100 @@ -779,6 +779,8 @@ (define_attr "enabled" "" ] (const_int 1))) +(define_attr "preferred_for_speed" "" (const_int 1)) + ;; Describe a user's asm statement. (define_asm_attributes [(set_attr "length" "128") @@ -4794,16 +4796,12 @@ (define_insn "*floatmode, mode)") - (eq_attr "alternative" "1") - /* ??? For sched1 we need constrain_operands to be able to - select an alternative. Leave this enabled before RA. */ - (symbol_ref "TARGET_INTER_UNIT_CONVERSIONS - || optimize_function_for_size_p (cfun) - || !(reload_completed - || reload_in_progress - || lra_in_progress)") ] (symbol_ref "true"))) + (set (attr "preferred_for_speed") + (cond [(eq_attr "alternative" "1") + (symbol_ref "TARGET_INTER_UNIT_CONVERSIONS")] + (symbol_ref "true"))) ]) (define_insn "*float2_i387" Index: gcc/testsuite/gcc.target/i386/conversion-2.c =================================================================== --- /dev/null 2014-10-06 08:13:11.214126005 +0100 +++ gcc/testsuite/gcc.target/i386/conversion-2.c 2014-10-17 15:53:10.893463291 +0100 @@ -0,0 +1,35 @@ +/* { dg-options "-O2 -fno-toplevel-reorder -mfpmath=sse" } */ +/* { dg-require-effective-target lp64 } */ + +void __attribute__ ((hot, target ("tune=bdver2"))) +f1 (int x) +{ + register float f asm ("%xmm0") = x; + asm volatile ("#f" :: "x" (f)); +} + +void __attribute__ ((cold, target ("tune=bdver2"))) +f2 (int x) +{ + register float f asm ("%xmm1") = x; + asm volatile ("#f" :: "x" (f)); +} + +void __attribute__ ((hot, target ("tune=bdver2"))) +f3 (int x) +{ + register float f asm ("%xmm2") = x; + asm volatile ("#f" :: "x" (f)); +} + +void __attribute__ ((cold, target ("tune=bdver2"))) +f4 (int x) +{ + register float f asm ("%xmm3") = x; + asm volatile ("#f" :: "x" (f)); +} + +/* { dg-final { scan-assembler "sp\\\), %xmm0" } } */ +/* { dg-final { scan-assembler "di, %xmm1" } } */ +/* { dg-final { scan-assembler "sp\\\), %xmm2" } } */ +/* { dg-final { scan-assembler "di, %xmm3" } } */