diff mbox series

GCN: Enable effective-target 'vect_hw_misalign'

Message ID 87frwjkgt5.fsf@euler.schwinge.ddns.net
State New
Headers show
Series GCN: Enable effective-target 'vect_hw_misalign' | expand

Commit Message

Thomas Schwinge March 21, 2024, 10:41 a.m. UTC
Hi!

OK to push the attached
"GCN: Enable effective-target 'vect_hw_misalign'"?  (Or is that not what
you'd expect to see for GCN?  I haven't checked the actual back end
code...)


Grüße
 Thomas

Comments

Andrew Stubbs March 25, 2024, 1:52 p.m. UTC | #1
On 21/03/2024 10:41, Thomas Schwinge wrote:
> Hi!
> 
> OK to push the attached
> "GCN: Enable effective-target 'vect_hw_misalign'"?  (Or is that not what
> you'd expect to see for GCN?  I haven't checked the actual back end
> code...)

OK.

Andrew.
diff mbox series

Patch

From dad0686e179e9395408a39ccfbf760bc30acffc9 Mon Sep 17 00:00:00 2001
From: Thomas Schwinge <tschwinge@baylibre.com>
Date: Wed, 20 Mar 2024 23:52:26 +0100
Subject: [PATCH] GCN: Enable effective-target 'vect_hw_misalign'

... as made apparent by commit 4e1fcf44bdc582e71408175d75e025f5be8b0e55
"testsuite: vect: Require vect_hw_misalign in gcc.dg/vect/vect-cost-model-1.c etc. [PR98238]"
causing:

     PASS: gcc.dg/vect/vect-cost-model-1.c (test for excess errors)
    -PASS: gcc.dg/vect/vect-cost-model-1.c scan-tree-dump vect "LOOP VECTORIZED"

     PASS: gcc.dg/vect/vect-cost-model-3.c (test for excess errors)
    -PASS: gcc.dg/vect/vect-cost-model-3.c scan-tree-dump vect "LOOP VECTORIZED"

     PASS: gcc.dg/vect/vect-cost-model-5.c (test for excess errors)
    -PASS: gcc.dg/vect/vect-cost-model-5.c scan-tree-dump vect "LOOP VECTORIZED"

..., and similarly commit ffd47fb63ddc024db847daa07f8ae27fffdfcb28
"testsuite: Fix pr113431.c FAIL on sparc* [PR113431]" causing:

     PASS: gcc.dg/vect/pr113431.c (test for excess errors)
     PASS: gcc.dg/vect/pr113431.c execution test
    -PASS: gcc.dg/vect/pr113431.c scan-tree-dump-times slp1 "optimized: basic block part vectorized" 2

..., which this commit all restores, and also enables a good number of further
FAIL -> PASS, UNSUPPORTED -> PASS, etc. progressions.  There are also a small
number of regressions, mostly in the SLP area apparently:

     PASS: gcc.dg/vect/bb-slp-layout-12.c (test for excess errors)
    +XPASS: gcc.dg/vect/bb-slp-layout-12.c scan-tree-dump-not slp1 "duplicating permutation node"
    +XFAIL: gcc.dg/vect/bb-slp-layout-12.c scan-tree-dump-times slp1 "add new stmt: [^\\n\\r]* = VEC_PERM_EXPR" 3

     PASS: gcc.dg/vect/bb-slp-layout-6.c (test for excess errors)
    +FAIL: gcc.dg/vect/bb-slp-layout-6.c scan-tree-dump slp2 "absorbing input layouts"

     PASS: gcc.dg/vect/pr97428.c (test for excess errors)
     PASS: gcc.dg/vect/pr97428.c scan-tree-dump vect "Detected interleaving load of size 8"
     PASS: gcc.dg/vect/pr97428.c scan-tree-dump vect "Detected interleaving store of size 16"
     PASS: gcc.dg/vect/pr97428.c scan-tree-dump-not vect "gap of 6 elements"
    -XFAIL: gcc.dg/vect/pr97428.c scan-tree-dump-times vect "vectorizing stmts using SLP" 2
    +FAIL: gcc.dg/vect/pr97428.c scan-tree-dump-times vect "vectorizing stmts using SLP" 2

     PASS: gcc.dg/vect/vect-33.c (test for excess errors)
    +FAIL: gcc.dg/vect/vect-33.c scan-tree-dump vect "Vectorizing an unaligned access"
     PASS: gcc.dg/vect/vect-33.c scan-tree-dump-not optimized "Invalid sum"
     PASS: gcc.dg/vect/vect-33.c scan-tree-dump-times vect "vectorized 1 loops" 1

..., so some further conditionalizing etc. seems necessary.  These seem to
mostly appear next to pre-existing similar FAILs in related test cases.
(Overall, way more PASS than FAIL.)

	gcc/testsuite/
	* lib/target-supports.exp
	(check_effective_target_vect_hw_misalign): Enable for GCN.
	(check_effective_target_vect_element_align): Adjust.
---
 gcc/testsuite/lib/target-supports.exp | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 302781e91de..2291a673d53 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -8309,7 +8309,8 @@  proc check_effective_target_vect_hw_misalign { } {
 	     || ([istarget s390*-*-*]
 		 && [check_effective_target_s390_vx])
 	     || ([istarget riscv*-*-*])
-	     || ([istarget loongarch*-*-*]) } {
+	     || ([istarget loongarch*-*-*])
+	     || [istarget amdgcn*-*-*] } {
 	  return 1
 	}
 	if { [istarget arm*-*-*]
@@ -8873,8 +8874,7 @@  proc check_effective_target_vect_element_align { } {
     return [check_cached_effective_target_indexed vect_element_align {
       expr { ([istarget arm*-*-*]
 	      && ![check_effective_target_arm_vect_no_misalign])
-	     || [check_effective_target_vect_hw_misalign]
-	     || [istarget amdgcn-*-*] }}]
+	     || [check_effective_target_vect_hw_misalign] }}]
 }
 
 # Return 1 if we expect to see unaligned accesses in at least some
-- 
2.34.1