diff mbox

[5/9] Create sensible dummy registers

Message ID 877fs04o5q.fsf@e105548-lin.cambridge.arm.com
State New
Headers show

Commit Message

Richard Sandiford May 22, 2015, 3:39 p.m. UTC 
Eric Botcazou <ebotcazou@adacore.com> writes:
>> Some pieces of code create a temporary REG or MEM and only fill it
>> in later when they're testing the cost of a particular rtx.  This patch
>> makes sure that even the dummy REG or MEM is valid, rather than force
>> the gen_* code to handle garbage values.
>> 
>> 
>> gcc/
>> 	* caller-save.c (init_caller_save): Use word_mode and
>> 	FIRST_PSEUDO_REGISTER when creating temporary rtxes.
>> 	* expr.c (init_expr_target): Likewise.
>> 	* ira.c (setup_prohibited_mode_move_regs): Likewise.
>> 	* postreload.c (reload_cse_regs_1): Likewise.
>
> Isn't LAST_VIRTUAL_REGISTER + 1 the canonical regno to be used in this case?

Ah, yeah.  Here's patch to fix all instances of that (I hope).

Bootstrapped & regression-tested on x86_64-linux-gnu.  OK to install?

Thanks,
Richard


gcc/
	* caller-save.c (init_caller_save): Base temporary register numbers
	on LAST_VIRTUAL_REGISTER + 1 rather than FIRST_PSEUDO_REGISTER.
	* cfgloopanal.c (init_set_costs): Likewise.
	* dojump.c (prefer_and_bit_test): Likewise.
	* expr.c (init_expr_target): Likewise.
	* ira.c (setup_prohibited_mode_move_regs): Likewise.
	* lower-subreg.c (init_lower_subreg): Likewise.
	* postreload.c (reload_cse_regs_1): Likewise.

Comments

Jeff Law May 22, 2015, 7:49 p.m. UTC | #1 
On 05/22/2015 09:39 AM, Richard Sandiford wrote:
> Eric Botcazou <ebotcazou@adacore.com> writes:
>>> Some pieces of code create a temporary REG or MEM and only fill it
>>> in later when they're testing the cost of a particular rtx.  This patch
>>> makes sure that even the dummy REG or MEM is valid, rather than force
>>> the gen_* code to handle garbage values.
>>>
>>>
>>> gcc/
>>> 	* caller-save.c (init_caller_save): Use word_mode and
>>> 	FIRST_PSEUDO_REGISTER when creating temporary rtxes.
>>> 	* expr.c (init_expr_target): Likewise.
>>> 	* ira.c (setup_prohibited_mode_move_regs): Likewise.
>>> 	* postreload.c (reload_cse_regs_1): Likewise.
>>
>> Isn't LAST_VIRTUAL_REGISTER + 1 the canonical regno to be used in this case?
>
> Ah, yeah.  Here's patch to fix all instances of that (I hope).
>
> Bootstrapped & regression-tested on x86_64-linux-gnu.  OK to install?
>
> Thanks,
> Richard
>
>
> gcc/
> 	* caller-save.c (init_caller_save): Base temporary register numbers
> 	on LAST_VIRTUAL_REGISTER + 1 rather than FIRST_PSEUDO_REGISTER.
> 	* cfgloopanal.c (init_set_costs): Likewise.
> 	* dojump.c (prefer_and_bit_test): Likewise.
> 	* expr.c (init_expr_target): Likewise.
> 	* ira.c (setup_prohibited_mode_move_regs): Likewise.
> 	* lower-subreg.c (init_lower_subreg): Likewise.
> 	* postreload.c (reload_cse_regs_1): Likewise.
OK.
jeff
diff mbox

Patch

Index: gcc/caller-save.c
===================================================================
--- gcc/caller-save.c	2015-05-21 08:31:02.045801973 +0100
+++ gcc/caller-save.c	2015-05-21 08:31:02.257799438 +0100
@@ -286,7 +286,7 @@  init_caller_save (void)
      To avoid lots of unnecessary RTL allocation, we construct all the RTL
      once, then modify the memory and register operands in-place.  */
 
-  test_reg = gen_rtx_REG (word_mode, FIRST_PSEUDO_REGISTER);
+  test_reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
   test_mem = gen_rtx_MEM (word_mode, address);
   savepat = gen_rtx_SET (test_mem, test_reg);
   restpat = gen_rtx_SET (test_reg, test_mem);
Index: gcc/cfgloopanal.c
===================================================================
--- gcc/cfgloopanal.c	2015-05-21 08:31:02.045801973 +0100
+++ gcc/cfgloopanal.c	2015-05-21 08:31:02.257799438 +0100
@@ -336,9 +336,9 @@  init_set_costs (void)
 {
   int speed;
   rtx_insn *seq;
-  rtx reg1 = gen_raw_REG (SImode, FIRST_PSEUDO_REGISTER);
-  rtx reg2 = gen_raw_REG (SImode, FIRST_PSEUDO_REGISTER + 1);
-  rtx addr = gen_raw_REG (Pmode, FIRST_PSEUDO_REGISTER + 2);
+  rtx reg1 = gen_raw_REG (SImode, LAST_VIRTUAL_REGISTER + 1);
+  rtx reg2 = gen_raw_REG (SImode, LAST_VIRTUAL_REGISTER + 2);
+  rtx addr = gen_raw_REG (Pmode, LAST_VIRTUAL_REGISTER + 3);
   rtx mem = validize_mem (gen_rtx_MEM (SImode, addr));
   unsigned i;
 
Index: gcc/dojump.c
===================================================================
--- gcc/dojump.c	2015-05-21 08:31:02.045801973 +0100
+++ gcc/dojump.c	2015-05-21 08:31:02.257799438 +0100
@@ -196,7 +196,7 @@  prefer_and_bit_test (machine_mode mode,
     {
       /* Set up rtxes for the two variations.  Use NULL as a placeholder
 	 for the BITNUM-based constants.  */
-      and_reg = gen_rtx_REG (mode, FIRST_PSEUDO_REGISTER);
+      and_reg = gen_rtx_REG (mode, LAST_VIRTUAL_REGISTER + 1);
       and_test = gen_rtx_AND (mode, and_reg, NULL);
       shift_test = gen_rtx_AND (mode, gen_rtx_ASHIFTRT (mode, and_reg, NULL),
 				const1_rtx);
Index: gcc/expr.c
===================================================================
--- gcc/expr.c	2015-05-21 08:31:02.049801925 +0100
+++ gcc/expr.c	2015-05-21 08:31:02.257799438 +0100
@@ -207,7 +207,7 @@  init_expr_target (void)
 
   /* A scratch register we can modify in-place below to avoid
      useless RTL allocations.  */
-  reg = gen_rtx_REG (word_mode, FIRST_PSEUDO_REGISTER);
+  reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
 
   insn = rtx_alloc (INSN);
   pat = gen_rtx_SET (NULL_RTX, NULL_RTX);
@@ -257,7 +257,7 @@  init_expr_target (void)
 	  }
     }
 
-  mem = gen_rtx_MEM (VOIDmode, gen_raw_REG (Pmode, FIRST_PSEUDO_REGISTER));
+  mem = gen_rtx_MEM (VOIDmode, gen_raw_REG (Pmode, LAST_VIRTUAL_REGISTER + 1));
 
   for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
        mode = GET_MODE_WIDER_MODE (mode))
Index: gcc/ira.c
===================================================================
--- gcc/ira.c	2015-05-21 08:31:02.049801925 +0100
+++ gcc/ira.c	2015-05-21 08:31:02.261799391 +0100
@@ -1767,8 +1767,8 @@  setup_prohibited_mode_move_regs (void)
   if (ira_prohibited_mode_move_regs_initialized_p)
     return;
   ira_prohibited_mode_move_regs_initialized_p = true;
-  test_reg1 = gen_rtx_REG (word_mode, FIRST_PSEUDO_REGISTER);
-  test_reg2 = gen_rtx_REG (word_mode, FIRST_PSEUDO_REGISTER);
+  test_reg1 = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
+  test_reg2 = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 2);
   move_pat = gen_rtx_SET (test_reg1, test_reg2);
   move_insn = gen_rtx_INSN (VOIDmode, 0, 0, 0, move_pat, 0, -1, 0);
   for (i = 0; i < NUM_MACHINE_MODES; i++)
Index: gcc/lower-subreg.c
===================================================================
--- gcc/lower-subreg.c	2015-05-21 08:31:02.049801925 +0100
+++ gcc/lower-subreg.c	2015-05-21 08:31:02.261799391 +0100
@@ -302,8 +302,8 @@  init_lower_subreg (void)
 
   twice_word_mode = GET_MODE_2XWIDER_MODE (word_mode);
 
-  rtxes.target = gen_rtx_REG (word_mode, FIRST_PSEUDO_REGISTER);
-  rtxes.source = gen_rtx_REG (word_mode, FIRST_PSEUDO_REGISTER + 1);
+  rtxes.target = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
+  rtxes.source = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 2);
   rtxes.set = gen_rtx_SET (rtxes.target, rtxes.source);
   rtxes.zext = gen_rtx_ZERO_EXTEND (twice_word_mode, rtxes.source);
   rtxes.shift = gen_rtx_ASHIFT (twice_word_mode, rtxes.source, const0_rtx);
Index: gcc/postreload.c
===================================================================
--- gcc/postreload.c	2015-05-21 08:31:02.049801925 +0100
+++ gcc/postreload.c	2015-05-21 08:31:02.261799391 +0100
@@ -234,7 +234,7 @@  reload_cse_regs_1 (void)
   bool cfg_changed = false;
   basic_block bb;
   rtx_insn *insn;
-  rtx testreg = gen_rtx_REG (word_mode, FIRST_PSEUDO_REGISTER);
+  rtx testreg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
 
   cselib_init (CSELIB_RECORD_MEMORY);
   init_alias_analysis ();