From patchwork Mon May 18 18:21:59 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Sandiford X-Patchwork-Id: 473542 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id A245014012C for ; Tue, 19 May 2015 04:22:11 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=M9N8Ebj6; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:references:date:in-reply-to:message-id:mime-version :content-type:content-transfer-encoding; q=dns; s=default; b=KZp mndabt9nHlwKGrVHdnLo7r2cDS51S3vi5QUPMHo6s8HIirkOGSl/CyeHKSbpb+jb Lk4AKvPBW3svzZnuh7/tDiZOwdd/JKqzpNWVhTwk14ADEdYBPLwLLl5GgvVckGmc JByNgIxcq3vNr1W15GnoE9m+Fww7bu2ssiuazcpo= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:references:date:in-reply-to:message-id:mime-version :content-type:content-transfer-encoding; s=default; bh=iyT8P/eaN PBP5BD33UWm/IIDOWc=; b=M9N8Ebj66uWHvnvJQy7GsoQVQHjowBkHgk4T1pIyn HUUBrFNHvd9muypAWTZmdDCKlwqatOxFE6jKPMSVsJTebxpxydwnnHQGmm0W/c/2 6QhYC73HVoJiOu8zME817V/1OQMTUPIfLfZ1Xi2WfavCHStU6xyIh+moNljxCt21 FI= Received: (qmail 80156 invoked by alias); 18 May 2015 18:22:04 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 80145 invoked by uid 89); 18 May 2015 18:22:03 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.3 required=5.0 tests=AWL, BAYES_00, KAM_ASCII_DIVIDERS, SPF_PASS autolearn=no version=3.3.2 X-HELO: eu-smtp-delivery-143.mimecast.com Received: from eu-smtp-delivery-143.mimecast.com (HELO eu-smtp-delivery-143.mimecast.com) (207.82.80.143) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 18 May 2015 18:22:02 +0000 Received: from cam-owa1.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.140]) by uk-mta-16.uk.mimecast.lan; Mon, 18 May 2015 19:21:59 +0100 Received: from localhost ([10.1.2.79]) by cam-owa1.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Mon, 18 May 2015 19:21:59 +0100 From: Richard Sandiford To: gcc-patches@gcc.gnu.org Mail-Followup-To: gcc-patches@gcc.gnu.org, richard.sandiford@arm.com Subject: [5/9] Create sensible dummy registers References: <87oalhu59s.fsf@e105548-lin.cambridge.arm.com> Date: Mon, 18 May 2015 19:21:59 +0100 In-Reply-To: <87oalhu59s.fsf@e105548-lin.cambridge.arm.com> (Richard Sandiford's message of "Mon, 18 May 2015 19:09:19 +0100") Message-ID: <871tidu4oo.fsf@e105548-lin.cambridge.arm.com> User-Agent: Gnus/5.130012 (Ma Gnus v0.12) Emacs/24.3 (gnu/linux) MIME-Version: 1.0 X-MC-Unique: yRHd6UOlTeaX2ToIXQWsNQ-1 Some pieces of code create a temporary REG or MEM and only fill it in later when they're testing the cost of a particular rtx. This patch makes sure that even the dummy REG or MEM is valid, rather than force the gen_* code to handle garbage values. gcc/ * caller-save.c (init_caller_save): Use word_mode and FIRST_PSEUDO_REGISTER when creating temporary rtxes. * expr.c (init_expr_target): Likewise. * ira.c (setup_prohibited_mode_move_regs): Likewise. * postreload.c (reload_cse_regs_1): Likewise. Index: gcc/caller-save.c =================================================================== --- gcc/caller-save.c 2015-05-16 15:50:58.063567104 +0100 +++ gcc/caller-save.c 2015-05-16 15:50:58.055567198 +0100 @@ -287,8 +287,8 @@ init_caller_save (void) To avoid lots of unnecessary RTL allocation, we construct all the RTL once, then modify the memory and register operands in-place. */ - test_reg = gen_rtx_REG (VOIDmode, 0); - test_mem = gen_rtx_MEM (VOIDmode, address); + test_reg = gen_rtx_REG (word_mode, FIRST_PSEUDO_REGISTER); + test_mem = gen_rtx_MEM (word_mode, address); savepat = gen_rtx_SET (test_mem, test_reg); restpat = gen_rtx_SET (test_reg, test_mem); Index: gcc/expr.c =================================================================== --- gcc/expr.c 2015-05-16 15:50:58.063567104 +0100 +++ gcc/expr.c 2015-05-16 15:50:58.059567152 +0100 @@ -202,12 +202,12 @@ init_expr_target (void) /* Try indexing by frame ptr and try by stack ptr. It is known that on the Convex the stack ptr isn't a valid index. With luck, one or the other is valid on any machine. */ - mem = gen_rtx_MEM (VOIDmode, stack_pointer_rtx); - mem1 = gen_rtx_MEM (VOIDmode, frame_pointer_rtx); + mem = gen_rtx_MEM (word_mode, stack_pointer_rtx); + mem1 = gen_rtx_MEM (word_mode, frame_pointer_rtx); /* A scratch register we can modify in-place below to avoid useless RTL allocations. */ - reg = gen_rtx_REG (VOIDmode, -1); + reg = gen_rtx_REG (word_mode, FIRST_PSEUDO_REGISTER); insn = rtx_alloc (INSN); pat = gen_rtx_SET (NULL_RTX, NULL_RTX); Index: gcc/ira.c =================================================================== --- gcc/ira.c 2015-05-16 15:50:58.063567104 +0100 +++ gcc/ira.c 2015-05-16 15:50:58.055567198 +0100 @@ -1767,8 +1767,8 @@ setup_prohibited_mode_move_regs (void) if (ira_prohibited_mode_move_regs_initialized_p) return; ira_prohibited_mode_move_regs_initialized_p = true; - test_reg1 = gen_rtx_REG (VOIDmode, 0); - test_reg2 = gen_rtx_REG (VOIDmode, 0); + test_reg1 = gen_rtx_REG (word_mode, FIRST_PSEUDO_REGISTER); + test_reg2 = gen_rtx_REG (word_mode, FIRST_PSEUDO_REGISTER); move_pat = gen_rtx_SET (test_reg1, test_reg2); move_insn = gen_rtx_INSN (VOIDmode, 0, 0, 0, move_pat, 0, -1, 0); for (i = 0; i < NUM_MACHINE_MODES; i++) Index: gcc/postreload.c =================================================================== --- gcc/postreload.c 2015-05-16 15:50:58.063567104 +0100 +++ gcc/postreload.c 2015-05-16 15:50:58.055567198 +0100 @@ -234,7 +234,7 @@ reload_cse_regs_1 (void) bool cfg_changed = false; basic_block bb; rtx_insn *insn; - rtx testreg = gen_rtx_REG (VOIDmode, -1); + rtx testreg = gen_rtx_REG (word_mode, FIRST_PSEUDO_REGISTER); cselib_init (CSELIB_RECORD_MEMORY); init_alias_analysis ();