From patchwork Sat Aug 7 10:56:12 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anatoly Sokolov X-Patchwork-Id: 61178 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id 73F14B6EEB for ; Sat, 7 Aug 2010 20:56:14 +1000 (EST) Received: (qmail 29867 invoked by alias); 7 Aug 2010 10:56:12 -0000 Received: (qmail 29854 invoked by uid 22791); 7 Aug 2010 10:56:10 -0000 X-SWARE-Spam-Status: No, hits=1.9 required=5.0 tests=AWL, BAYES_40, KAM_THEBAT, RCVD_IN_DNSWL_NONE, TW_EG, T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from contrabass.post.ru (HELO contrabass.post.ru) (85.21.78.5) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Sat, 07 Aug 2010 10:56:04 +0000 Received: from corbina.ru (mail.post.ru [195.14.50.16]) by contrabass.post.ru (Postfix) with ESMTP id BAC379500; Sat, 7 Aug 2010 14:56:00 +0400 (MSD) Received: from [95.25.188.61] (account aesok@post.ru HELO Vista.corbina.ru) by corbina.ru (CommuniGate Pro SMTP 5.1.14) with ESMTPA id 242410077; Sat, 07 Aug 2010 14:56:00 +0400 Date: Sat, 7 Aug 2010 14:56:12 +0400 From: Anatoly Sokolov Message-ID: <868531388.20100807145612@post.ru> To: gcc-patches@gcc.gnu.org CC: echristo@apple.com, rdsandiford@googlemail.com Subject: [MIPS] Hookize REGISTER_MOVE_COST and MEMORY_MOVE_COST MIME-Version: 1.0 X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Hi. This patch removes obsolete REGISTER_MOVE_COST and MEMORY_MOVE_COST macros from the MIPS back end in the GCC and introduces equivalent TARGET_REGISTER_MOVE_COST and TARGET_MEMORY_MOVE_COST target hooks. Regression tested on mips64el-unknown-linux-gnu. OK to install? * reload.h (register_move_cost, memory_move_secondary_cost, secondary_reload_class): Adjust prototype. * rtl.h (reg_class_subset_p): Adjust prototype. * reload.c (secondary_reload_class): Change arguments type from enum reg_class to reg_class_t. Change result type to reg_class_t. * reginfo.c (register_move_cost, reg_class_subset_p): Change arguments type from enum reg_class to reg_class_t. (memory_move_secondary_cost): Change arguments type from enum reg_class to reg_class_t. Change type of saved_flags to reg_class_t. * config/mips/mips.h (REGISTER_MOVE_COST, MEMORY_MOVE_COST): Remove macros. (mips_cost): Remove. (struct mips_rtx_cost_data): Moved to mips.c. * config/mips/mips-protos.h (mips_register_move_cost): Remove. * config/mips/mips.c (struct mips_rtx_cost_data): Moved from mips.h. (mips_cost): Make static. (mips_canonicalize_move_class): Change argument type to reg_class_t. Change result type to reg_class_t. (mips_move_to_gpr_cost, mips_move_from_gpr_cost): Change arguments type from enum reg_class to reg_class_t. (mips_register_move_cost): Make static. Change arguments type from enum reg_class to reg_class_t. (mips_memory_move_cost): New function. (TARGET_REGISTER_MOVE_COST, TARGET_MEMORY_MOVE_COST): Define. Anatoly. Index: gcc/reload.c =================================================================== --- gcc/reload.c (revision 162975) +++ gcc/reload.c (working copy) @@ -518,9 +518,9 @@ /* If a secondary reload is needed, return its class. If both an intermediate register and a scratch register is needed, we return the class of the intermediate register. */ -enum reg_class -secondary_reload_class (bool in_p, enum reg_class rclass, - enum machine_mode mode, rtx x) +reg_class_t +secondary_reload_class (bool in_p, reg_class_t rclass, enum machine_mode mode, + rtx x) { enum insn_code icode; secondary_reload_info sri; Index: gcc/reload.h =================================================================== --- gcc/reload.h (revision 162975) +++ gcc/reload.h (working copy) @@ -30,11 +30,9 @@ SECONDARY_RELOAD_CLASS (CLASS, MODE, X) #endif -extern int register_move_cost (enum machine_mode, enum reg_class, - enum reg_class); +extern int register_move_cost (enum machine_mode, reg_class_t, reg_class_t); extern int memory_move_cost (enum machine_mode, enum reg_class, bool); -extern int memory_move_secondary_cost (enum machine_mode, enum reg_class, - bool); +extern int memory_move_secondary_cost (enum machine_mode, reg_class_t, bool); /* Maximum number of reloads we can need. */ #define MAX_RELOADS (2 * MAX_RECOG_OPERANDS * (MAX_REGS_PER_ADDRESS + 1)) @@ -292,8 +290,8 @@ /* Functions from reload.c: */ -extern enum reg_class secondary_reload_class (bool, enum reg_class, - enum machine_mode, rtx); +extern reg_class_t secondary_reload_class (bool, reg_class_t, + enum machine_mode, rtx); #ifdef GCC_INSN_CODES_H extern enum reg_class scratch_reload_class (enum insn_code); Index: gcc/rtl.h =================================================================== --- gcc/rtl.h (revision 162975) +++ gcc/rtl.h (working copy) @@ -2371,7 +2371,7 @@ /* In reginfo.c */ extern int reg_classes_intersect_p (reg_class_t, reg_class_t); -extern int reg_class_subset_p (enum reg_class, enum reg_class); +extern int reg_class_subset_p (reg_class_t, reg_class_t); extern void globalize_reg (int); extern void init_reg_modes_target (void); extern void init_regs (void); Index: gcc/reginfo.c =================================================================== --- gcc/reginfo.c (revision 162975) +++ gcc/reginfo.c (working copy) @@ -628,8 +628,7 @@ TO, using MODE. */ int -register_move_cost (enum machine_mode mode, enum reg_class from, - enum reg_class to) +register_move_cost (enum machine_mode mode, reg_class_t from, reg_class_t to) { return targetm.register_move_cost (mode, from, to); } @@ -644,10 +643,10 @@ /* Compute extra cost of moving registers to/from memory due to reloads. Only needed if secondary reloads are required for memory moves. */ int -memory_move_secondary_cost (enum machine_mode mode, enum reg_class rclass, +memory_move_secondary_cost (enum machine_mode mode, reg_class_t rclass, bool in) { - enum reg_class altclass; + reg_class_t altclass; int partial_cost = 0; /* We need a memory reference to feed to SECONDARY... macros. */ /* mem may be unused even if the SECONDARY_ macros are defined. */ @@ -1174,7 +1173,7 @@ /* Return nonzero if C1 is a subset of C2, i.e., if every register in C1 is also in C2. */ int -reg_class_subset_p (enum reg_class c1, enum reg_class c2) +reg_class_subset_p (reg_class_t c1, reg_class_t c2) { return (c1 == c2 || c2 == ALL_REGS Index: gcc/config/mips/mips-protos.h =================================================================== --- gcc/config/mips/mips-protos.h (revision 162975) +++ gcc/config/mips/mips-protos.h (working copy) @@ -295,8 +295,6 @@ enum machine_mode, rtx, bool); extern int mips_class_max_nregs (enum reg_class, enum machine_mode); -extern int mips_register_move_cost (enum machine_mode, enum reg_class, - enum reg_class); extern int mips_adjust_insn_length (rtx, int); extern void mips_output_load_label (rtx); Index: gcc/config/mips/mips.c =================================================================== --- gcc/config/mips/mips.c (revision 162975) +++ gcc/config/mips/mips.c (working copy) @@ -474,6 +474,23 @@ HOST_WIDE_INT size; }; +/* Costs of various operations on the different architectures. */ + +struct mips_rtx_cost_data +{ + unsigned short fp_add; + unsigned short fp_mult_sf; + unsigned short fp_mult_df; + unsigned short fp_div_sf; + unsigned short fp_div_df; + unsigned short int_mult_si; + unsigned short int_mult_di; + unsigned short int_div_si; + unsigned short int_div_di; + unsigned short branch_cost; + unsigned short memory_latency; +}; + /* Global variables for machine-dependent things. */ /* The -G setting, or the configuration's default small-data limit if @@ -522,7 +539,7 @@ int mips_abi = MIPS_ABI_DEFAULT; /* Which cost information to use. */ -const struct mips_rtx_cost_data *mips_cost; +static const struct mips_rtx_cost_data *mips_cost; /* The ambient target flags, excluding MASK_MIPS16. */ static int mips_base_target_flags; @@ -1167,6 +1184,7 @@ }; static rtx mips_find_pic_call_symbol (rtx, rtx); +static int mips_register_move_cost (enum machine_mode, reg_class_t, reg_class_t); /* This hash table keeps track of implicit "mips16" and "nomips16" attributes for -mflip_mips16. It maps decl names onto a boolean mode setting. */ @@ -10809,8 +10827,8 @@ /* RCLASS is a class involved in a REGISTER_MOVE_COST calculation. Return a "canonical" class to represent it in later calculations. */ -static enum reg_class -mips_canonicalize_move_class (enum reg_class rclass) +static reg_class_t +mips_canonicalize_move_class (reg_class_t rclass) { /* All moves involving accumulator registers have the same cost. */ if (reg_class_subset_p (rclass, ACC_REGS)) @@ -10832,7 +10850,7 @@ static int mips_move_to_gpr_cost (enum machine_mode mode ATTRIBUTE_UNUSED, - enum reg_class from) + reg_class_t from) { switch (from) { @@ -10868,7 +10886,7 @@ other classes handled by this function. */ static int -mips_move_from_gpr_cost (enum machine_mode mode, enum reg_class to) +mips_move_from_gpr_cost (enum machine_mode mode, reg_class_t to) { switch (to) { @@ -10900,15 +10918,15 @@ } } -/* Implement REGISTER_MOVE_COST. Return 0 for classes that are the +/* Implement TARGET_REGISTER_MOVE_COST. Return 0 for classes that are the maximum of the move costs for subclasses; regclass will work out the maximum for us. */ -int +static int mips_register_move_cost (enum machine_mode mode, - enum reg_class from, enum reg_class to) + reg_class_t from, reg_class_t to) { - enum reg_class dregs; + reg_class_t dregs; int cost1, cost2; from = mips_canonicalize_move_class (from); @@ -10944,6 +10962,16 @@ return 0; } +/* Implement TARGET_MEMORY_MOVE_COST. */ + +static int +mips_memory_move_cost (enum machine_mode mode, reg_class_t rclass, bool in) +{ + return mips_cost->memory_latency + + memory_move_secondary_cost (mode, rclass, in); +} + + /* Implement TARGET_IRA_COVER_CLASSES. */ static const reg_class_t * @@ -16375,6 +16403,10 @@ #undef TARGET_VALID_POINTER_MODE #define TARGET_VALID_POINTER_MODE mips_valid_pointer_mode +#undef TARGET_REGISTER_MOVE_COST +#define TARGET_REGISTER_MOVE_COST mips_register_move_cost +#undef TARGET_MEMORY_MOVE_COST +#define TARGET_MEMORY_MOVE_COST mips_memory_move_cost #undef TARGET_RTX_COSTS #define TARGET_RTX_COSTS mips_rtx_costs #undef TARGET_ADDRESS_COST Index: gcc/config/mips/mips.h =================================================================== --- gcc/config/mips/mips.h (revision 162975) +++ gcc/config/mips/mips.h (working copy) @@ -28,23 +28,6 @@ /* MIPS external variables defined in mips.c. */ -/* Costs of various operations on the different architectures. */ - -struct mips_rtx_cost_data -{ - unsigned short fp_add; - unsigned short fp_mult_sf; - unsigned short fp_mult_df; - unsigned short fp_div_sf; - unsigned short fp_div_df; - unsigned short int_mult_si; - unsigned short int_mult_di; - unsigned short int_div_si; - unsigned short int_div_di; - unsigned short branch_cost; - unsigned short memory_latency; -}; - /* Which ABI to use. ABI_32 (original 32, or o32), ABI_N32 (n32), ABI_64 (n64) are all defined by SGI. ABI_O64 is o32 extended to work on a 64-bit machine. */ @@ -2487,30 +2470,7 @@ #define FUNCTION_MODE SImode -/* A C expression for the cost of moving data from a register in - class FROM to one in class TO. The classes are expressed using - the enumeration values such as `GENERAL_REGS'. A value of 2 is - the default; other values are interpreted relative to that. - It is not required that the cost always equal 2 when FROM is the - same as TO; on some machines it is expensive to move between - registers if they are not general registers. - - If reload sees an insn consisting of a single `set' between two - hard registers, and if `REGISTER_MOVE_COST' applied to their - classes returns a value of 2, reload does not check to ensure - that the constraints of the insn are met. Setting a cost of - other than 2 will allow reload to verify that the constraints are - met. You should do this if the `movM' pattern's constraints do - not allow such copying. */ - -#define REGISTER_MOVE_COST(MODE, FROM, TO) \ - mips_register_move_cost (MODE, FROM, TO) - -#define MEMORY_MOVE_COST(MODE,CLASS,TO_P) \ - (mips_cost->memory_latency \ - + memory_move_secondary_cost ((MODE), (CLASS), (TO_P))) - /* Define if copies to/from condition code registers should be avoided. This is needed for the MIPS because reload_outcc is not complete; @@ -3019,7 +2979,6 @@ extern int mips_abi; /* which ABI to use */ extern const struct mips_cpu_info *mips_arch_info; extern const struct mips_cpu_info *mips_tune_info; -extern const struct mips_rtx_cost_data *mips_cost; extern bool mips_base_mips16; extern enum mips_code_readable_setting mips_code_readable; extern GTY(()) struct target_globals *mips16_globals;