From patchwork Thu Dec 15 16:07:30 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Richard Earnshaw (lists)" X-Patchwork-Id: 706172 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3tfdgh3hK4z9ssP for ; Fri, 16 Dec 2016 03:09:52 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="UTaWp4GO"; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :subject:to:references:message-id:date:mime-version:in-reply-to :content-type; q=dns; s=default; b=YYNxkoOWhBMAkcG9NACCS8gYGhxSh LqzavZQDadx7QtBpRBDOe1i1bKR3Hx6e2e6smcCSbtrLcvKPeKRyrcG0pUMHh6KN pd5eyTWZYVVi5aj0V73hvt9QGQg5Y7hzHwl/N6Tdiy3SJNRXlnE9l9jRG9v0JA1M MAZw6CbEYytaio= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :subject:to:references:message-id:date:mime-version:in-reply-to :content-type; s=default; bh=QeQOyCWTXVdIFpb5GXJm2PdJP/0=; b=UTa Wp4GOCX01JMhtUXQuyGz96D/U4PGR5s5HyS1e6LZT2kn1dCTztozEQ/UkiqOQuwl VQVmW44MugyOY1vbYxxY8JgMhDjpSTKBdZcsQZlUNQcu4UwBVNK2DcJYFbg58MeJ X1HNtIqS16WvYFgRWwcXrz5Qd8DXNO8yuUaYBcDg= Received: (qmail 41037 invoked by alias); 15 Dec 2016 16:07:35 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 40976 invoked by uid 89); 15 Dec 2016 16:07:35 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-5.0 required=5.0 tests=BAYES_00, RP_MATCHES_RCVD, SPF_PASS autolearn=ham version=3.3.2 spammy=*stream X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 15 Dec 2016 16:07:33 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 29AC01516; Thu, 15 Dec 2016 08:07:32 -0800 (PST) Received: from e105689-lin.cambridge.arm.com (e105689-lin.cambridge.arm.com [10.2.207.32]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D04BC3F445 for ; Thu, 15 Dec 2016 08:07:31 -0800 (PST) From: "Richard Earnshaw (lists)" Subject: [PATCH 16/21] [arm] Eliminate TARGET_FPU_NAME. To: gcc-patches@gcc.gnu.org References: Message-ID: <83eb28ac-fd01-fb8e-5ceb-608641b0e440@arm.com> Date: Thu, 15 Dec 2016 16:07:30 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.5.1 MIME-Version: 1.0 In-Reply-To: Rather than assuming a specific fpu name has been selected, we work out the FPU from the ISA properties. This is necessary since once we have default FPUs selected by the processor, there will be no explicit entry in the table of fpus to refer to. This also fixes a bug with the code I added recently to permit new aliases for existing FPU names: the new names cannot be passed to the assembler since it does not recognize them. By mapping the ISA features back to the canonical names we avoid having to teach the assembler about the new names. * arm.h (TARGET_FPU_NAME): Delete. * arm.c (arm_identify_fpu_from_isa): New function. (arm_declare_function_name): Use it to get the name for the FPU. --- gcc/config/arm/arm.c | 26 ++++++++++++++++++++++++-- gcc/config/arm/arm.h | 1 - 2 files changed, 24 insertions(+), 3 deletions(-) diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 437ee2d..df7a3ea 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -3256,7 +3256,7 @@ arm_configure_build_target (struct arm_build_target *target, gcc_assert (arm_selected_cpu); arm_selected_fpu = &all_fpus[opts->x_arm_fpu_index]; - auto_sbitmap fpu_bits(isa_num_bits); + auto_sbitmap fpu_bits (isa_num_bits); arm_initialize_isa (fpu_bits, arm_selected_fpu->isa_bits); bitmap_and_compl (target->isa, target->isa, isa_all_fpubits); @@ -30433,6 +30433,26 @@ arm_valid_target_attribute_p (tree fndecl, tree ARG_UNUSED (name), return ret; } +/* Match an ISA feature bitmap to a named FPU. We always use the + first entry that exactly matches the feature set, so that we + effectively canonicalize the FPU name for the assembler. */ +static const char* +arm_identify_fpu_from_isa (sbitmap isa) +{ + auto_sbitmap fpubits (isa_num_bits); + auto_sbitmap cand_fpubits (isa_num_bits); + + bitmap_and (fpubits, isa, isa_all_fpubits); + for (unsigned int i = 0; i < ARRAY_SIZE (all_fpus); i++) + { + arm_initialize_isa (cand_fpubits, all_fpus[i].isa_bits); + if (bitmap_equal_p (fpubits, cand_fpubits)) + return all_fpus[i].name; + } + /* We must find an entry, or things have gone wrong. */ + gcc_unreachable (); +} + void arm_declare_function_name (FILE *stream, const char *name, tree decl) { @@ -30454,7 +30474,9 @@ arm_declare_function_name (FILE *stream, const char *name, tree decl) fprintf (stream, "\t.arm\n"); asm_fprintf (asm_out_file, "\t.fpu %s\n", - TARGET_SOFT_FLOAT ? "softvfp" : TARGET_FPU_NAME); + (TARGET_SOFT_FLOAT + ? "softvfp" + : arm_identify_fpu_from_isa (arm_active_target.isa))); if (TARGET_POKE_FUNCTION_NAME) arm_poke_function_name (stream, (const char *) name); diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index 908e763..980bb74 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -369,7 +369,6 @@ extern const struct arm_fpu_desc /* Accessors. */ -#define TARGET_FPU_NAME (all_fpus[arm_fpu_index].name) #define TARGET_FPU_FEATURES (all_fpus[arm_fpu_index].features) /* Which floating point hardware to schedule for. */