From patchwork Mon Feb 6 10:03:12 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Georg-Johann Lay X-Patchwork-Id: 724415 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3vH32d6lxvz9ryr for ; Mon, 6 Feb 2017 21:03:37 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="XXeiWDrX"; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:cc:to :from:subject:message-id:date:mime-version:content-type; q=dns; s=default; b=mbosokyk+vxk+csSimH346xTNU/MgdsmI+sBY+GHUN1JKjXErS 1m+UgyQ0nhfESJkhrVFg11h9Y6e84k9ItYAURNvWQoqmGuHjMMtU6LSW1UeYdeCa HRuPCpV14WIvlnvKtGnO4rbRN2y3BTCpENYF3nZt74nv/wlreve/vdP5g= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:cc:to :from:subject:message-id:date:mime-version:content-type; s= default; bh=IhCu5fzrooeeZwJfmcLPu8iLJAg=; b=XXeiWDrXHQHmkJrnmK0d 7anjrb20vIsTo+Cuft4enFi3MrJ1NJbsjP4tU1PZThFN2Ej6CMi60/pnT6fWSmrG fnPGNy/j6O6JhHiYVUjTkupsgVQZICoGMbfya8Flyjl3z/3pbihh37XXsnP8VxBP zwQxq1gtdzJmZh7H90eOcoo= Received: (qmail 79692 invoked by alias); 6 Feb 2017 10:03:29 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 79628 invoked by uid 89); 6 Feb 2017 10:03:25 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.5 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_LOW autolearn=ham version=3.3.2 spammy=H*r:present, zero_extend, uint16_t, H*r:39.12 X-HELO: mo4-p00-ob.smtp.rzone.de Received: from mo4-p00-ob.smtp.rzone.de (HELO mo4-p00-ob.smtp.rzone.de) (81.169.146.218) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 06 Feb 2017 10:03:15 +0000 X-RZG-AUTH: :LXoWVUeid/7A29J/hMvvT3ol15ykJcYwTPLBCxG2PQt7BpWLF2I= X-RZG-CLASS-ID: mo00 Received: from [192.168.0.123] (ip5f5871bb.dynamic.kabel-deutschland.de [95.88.113.187]) by smtp.strato.de (RZmta 39.12 DYNA|AUTH) with ESMTPSA id e071aat16A3C1Un (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA (curve secp521r1 with 521 ECDH bits, eq. 15360 bits RSA)) (Client did not present a certificate); Mon, 6 Feb 2017 11:03:12 +0100 (CET) Cc: Denis Chertykov To: gcc-patches From: Georg-Johann Lay Subject: [patch,avr] Tweak addhi3_zero_extend. Message-ID: <7be3b0f5-fb1f-c4a8-af1b-12377b592326@gjlay.de> Date: Mon, 6 Feb 2017 11:03:12 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.6.0 MIME-Version: 1.0 X-IsSubscribed: yes This patch adds an alternative to addhi3_zero_extend for the case where output operand and the 8-bit addend happen to reside the the same register. Without the patch this might lead to additional reloads to satisfy the constraints like uint16_t func (uint8_t x, uint16_t y) { return x + y; } Without the new alternative the code will be func: movw r18,r22 ; 18 *movhi/1 [length = 1] add r18,r24 ; 13 *addhi3_zero_extend [length = 2] adc r19,__zero_reg__ movw r24,r18 ; 19 *movhi/1 [length = 1] /* epilogue start */ ret With the change the code reads func: add r24,r22 ; 13 *addhi3_zero_extend/2 [length = 3] mov r25,r23 adc r25,__zero_reg__ /* epilogue start */ ret which has smaller code size and register pressure. Ok for trunk? Johann * config/avr/avr.md (*addhi3_zero_extend): Add alternative where REGNO($0) == REGNO($1). Index: config/avr/avr.md =================================================================== --- config/avr/avr.md (revision 244001) +++ config/avr/avr.md (working copy) @@ -1200,12 +1200,14 @@ (define_expand "add3" (define_insn "*addhi3_zero_extend" - [(set (match_operand:HI 0 "register_operand" "=r") - (plus:HI (zero_extend:HI (match_operand:QI 1 "register_operand" "r")) - (match_operand:HI 2 "register_operand" "0")))] + [(set (match_operand:HI 0 "register_operand" "=r,*?r") + (plus:HI (zero_extend:HI (match_operand:QI 1 "register_operand" "r ,0")) + (match_operand:HI 2 "register_operand" "0 ,r")))] "" - "add %A0,%1\;adc %B0,__zero_reg__" - [(set_attr "length" "2") + "@ + add %A0,%1\;adc %B0,__zero_reg__ + add %A0,%A2\;mov %B0,%B2\;adc %B0,__zero_reg__" + [(set_attr "length" "2,3") (set_attr "cc" "set_n")]) (define_insn "*addhi3_zero_extend1"